Commit 7cef9875 authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'samsung-updates' of... 

Merge tag 'samsung-updates' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/soc

Merge "Samsung mach updates for v4.1" from Kukjin Kim:

- for s3c64xx
  : use fixed IRQ bases to avoid conflicts on Cragganmore

- for exynos3250
  : add cpuidle and AFTR mode support
  : fix CPU1 hotplug

- for exynos SoCs
  : add code for setting/clearing boot flag for cpuidle AFTR
  : remove left over 'extra_save' and constify 'exynos_pm_data' array
  : use static in suspend.c as per compiler suggestions
  : use platform device name as power domain name
  : add support for async-bridge clocks for pm_domains (exynos5420)

* tag 'samsung-updates' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung

:
  ARM: EXYNOS: allow cpuidle driver usage on Exynos3250 SoC
  ARM: EXYNOS: add AFTR mode support for Exynos3250
  ARM: EXYNOS: add code for setting/clearing boot flag
  ARM: EXYNOS: fix CPU1 hotplug on Exynos3250
  ARM: S3C64XX: Use fixed IRQ bases to avoid conflicts on Cragganmore
  ARM: EXYNOS: Remove left over 'extra_save'
  ARM: EXYNOS: Constify exynos_pm_data array
  ARM: EXYNOS: use static in suspend.c
  ARM: EXYNOS: Use platform device name as power domain name
  ARM: EXYNOS: add support for async-bridge clocks for pm_domains

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents f83255cc bd0d888c

arch/arm/mach-exynos/common.h

+6 −0
Original line number Diff line number Diff line
@@ -126,6 +126,12 @@ enum { 


void exynos_firmware_init(void);



/* CPU BOOT mode flag for Exynos3250 SoC bootloader */

#define C2_STATE	(1 << 3)



void exynos_set_boot_flag(unsigned int cpu, unsigned int mode);

void exynos_clear_boot_flag(unsigned int cpu, unsigned int mode);



extern u32 exynos_get_eint_wake_mask(void);



#ifdef CONFIG_PM_SLEEP

arch/arm/mach-exynos/exynos.c

+1 −0
Original line number Diff line number Diff line
@@ -219,6 +219,7 @@ static void __init exynos_dt_machine_init(void) 
	    of_machine_is_compatible("samsung,exynos4212") ||

	    (of_machine_is_compatible("samsung,exynos4412") &&

	     of_machine_is_compatible("samsung,trats2")) ||

	    of_machine_is_compatible("samsung,exynos3250") ||

	    of_machine_is_compatible("samsung,exynos5250"))

		platform_device_register(&exynos_cpuidle);

arch/arm/mach-exynos/firmware.c

+32 −1
Original line number Diff line number Diff line
@@ -48,6 +48,12 @@ static int exynos_do_idle(unsigned long mode) 
		__raw_writel(virt_to_phys(exynos_cpu_resume_ns),

			     sysram_ns_base_addr + 0x24);

		__raw_writel(EXYNOS_AFTR_MAGIC, sysram_ns_base_addr + 0x20);

		if (soc_is_exynos3250()) {

			exynos_smc(SMC_CMD_SAVE, OP_TYPE_CORE,

				   SMC_POWERSTATE_IDLE, 0);

			exynos_smc(SMC_CMD_SHUTDOWN, OP_TYPE_CLUSTER,

				   SMC_POWERSTATE_IDLE, 0);

		} else

			exynos_smc(SMC_CMD_CPU0AFTR, 0, 0, 0);

		break;

	case FW_DO_IDLE_SLEEP:
@@ -206,3 +212,28 @@ void __init exynos_firmware_init(void) 
		outer_cache.configure = exynos_l2_configure;

	}

}



#define REG_CPU_STATE_ADDR	(sysram_ns_base_addr + 0x28)

#define BOOT_MODE_MASK		0x1f



void exynos_set_boot_flag(unsigned int cpu, unsigned int mode)

{

	unsigned int tmp;



	tmp = __raw_readl(REG_CPU_STATE_ADDR + cpu * 4);



	if (mode & BOOT_MODE_MASK)

		tmp &= ~BOOT_MODE_MASK;



	tmp |= mode;

	__raw_writel(tmp, REG_CPU_STATE_ADDR + cpu * 4);

}



void exynos_clear_boot_flag(unsigned int cpu, unsigned int mode)

{

	unsigned int tmp;



	tmp = __raw_readl(REG_CPU_STATE_ADDR + cpu * 4);

	tmp &= ~mode;

	__raw_writel(tmp, REG_CPU_STATE_ADDR + cpu * 4);

}

arch/arm/mach-exynos/platsmp.c

+20 −3
Original line number Diff line number Diff line
@@ -126,6 +126,8 @@ static inline void platform_do_lowpower(unsigned int cpu, int *spurious) 
 */

void exynos_cpu_power_down(int cpu)

{

	u32 core_conf;



	if (cpu == 0 && (of_machine_is_compatible("samsung,exynos5420") ||

		of_machine_is_compatible("samsung,exynos5800"))) {

		/*
@@ -138,7 +140,10 @@ void exynos_cpu_power_down(int cpu) 
		if (!(val & S5P_CORE_LOCAL_PWR_EN))

			return;

	}

	pmu_raw_writel(0, EXYNOS_ARM_CORE_CONFIGURATION(cpu));



	core_conf = pmu_raw_readl(EXYNOS_ARM_CORE_CONFIGURATION(cpu));

	core_conf &= ~S5P_CORE_LOCAL_PWR_EN;

	pmu_raw_writel(core_conf, EXYNOS_ARM_CORE_CONFIGURATION(cpu));

}



/**
@@ -149,7 +154,12 @@ void exynos_cpu_power_down(int cpu) 
 */

void exynos_cpu_power_up(int cpu)

{

	pmu_raw_writel(S5P_CORE_LOCAL_PWR_EN,

	u32 core_conf = S5P_CORE_LOCAL_PWR_EN;



	if (soc_is_exynos3250())

		core_conf |= S5P_CORE_AUTOWAKEUP_EN;



	pmu_raw_writel(core_conf,

			EXYNOS_ARM_CORE_CONFIGURATION(cpu));

}
@@ -227,6 +237,10 @@ static void exynos_core_restart(u32 core_id) 
	if (!of_machine_is_compatible("samsung,exynos3250"))

		return;



	while (!pmu_raw_readl(S5P_PMU_SPARE2))

		udelay(10);

	udelay(10);



	val = pmu_raw_readl(EXYNOS_ARM_CORE_STATUS(core_id));

	val |= S5P_CORE_WAKEUP_FROM_LOCAL_CFG;

	pmu_raw_writel(val, EXYNOS_ARM_CORE_STATUS(core_id));
@@ -347,6 +361,9 @@ static int exynos_boot_secondary(unsigned int cpu, struct task_struct *idle) 


		call_firmware_op(cpu_boot, core_id);



		if (soc_is_exynos3250())

			dsb_sev();

		else

			arch_send_wakeup_ipi_mask(cpumask_of(cpu));



		if (pen_release == -1)

arch/arm/mach-exynos/pm.c

+11 −1
Original line number Diff line number Diff line
@@ -127,6 +127,8 @@ int exynos_pm_central_resume(void) 
static void exynos_set_wakeupmask(long mask)

{

	pmu_raw_writel(mask, S5P_WAKEUP_MASK);

	if (soc_is_exynos3250())

		pmu_raw_writel(0x0, S5P_WAKEUP_MASK2);

}



static void exynos_cpu_set_boot_vector(long flags)
@@ -140,7 +142,7 @@ static int exynos_aftr_finisher(unsigned long flags) 
{

	int ret;



	exynos_set_wakeupmask(0x0000ff3e);

	exynos_set_wakeupmask(soc_is_exynos3250() ? 0x40003ffe : 0x0000ff3e);

	/* Set value of power down register for aftr mode */

	exynos_sys_powerdown_conf(SYS_AFTR);
@@ -157,8 +159,13 @@ static int exynos_aftr_finisher(unsigned long flags) 


void exynos_enter_aftr(void)

{

	unsigned int cpuid = smp_processor_id();



	cpu_pm_enter();



	if (soc_is_exynos3250())

		exynos_set_boot_flag(cpuid, C2_STATE);



	exynos_pm_central_suspend();



	if (of_machine_is_compatible("samsung,exynos4212") ||
@@ -178,6 +185,9 @@ void exynos_enter_aftr(void) 


	exynos_pm_central_resume();



	if (soc_is_exynos3250())

		exynos_clear_boot_flag(cpuid, C2_STATE);



	cpu_pm_exit();

}

CRA Git | Maintained and supported by SUSTech CRA and CCSE