Commit 7cd0aaaf authored by Marc Zyngier's avatar Marc Zyngier
Browse files

KVM: arm64: Turn host HVC handling into a dispatch table 



Now that we can use function pointer, use a dispatch table to call
the individual HVC handlers, leading to more maintainable code.

Further improvements include helpers to declare the mapping of
local variables to values passed in the host context.

Reviewed-by: default avatarAlexandru Elisei <alexandru.elisei@arm.com>
Signed-off-by: default avatarMarc Zyngier <maz@kernel.org>
parent 1db9d9de

arch/arm64/kernel/image-vars.h

+1 −0
Original line number Diff line number Diff line
@@ -64,6 +64,7 @@ __efistub__ctype = _ctype; 
/* Alternative callbacks for init-time patching of nVHE hyp code. */

KVM_NVHE_ALIAS(kvm_patch_vector_branch);

KVM_NVHE_ALIAS(kvm_update_va_mask);

KVM_NVHE_ALIAS(kvm_update_kimg_phys_offset);



/* Global kernel state accessed by nVHE hyp code. */

KVM_NVHE_ALIAS(kvm_vgic_global_state);

arch/arm64/kvm/hyp/nvhe/hyp-main.c

+134 −94
Original line number Diff line number Diff line
@@ -12,106 +12,146 @@ 
#include <asm/kvm_hyp.h>

#include <asm/kvm_mmu.h>



#include <kvm/arm_hypercalls.h>

#define cpu_reg(ctxt, r)	(ctxt)->regs.regs[r]

#define DECLARE_REG(type, name, ctxt, reg)	\

				type name = (type)cpu_reg(ctxt, (reg))



static void handle_host_hcall(unsigned long func_id,

			      struct kvm_cpu_context *host_ctxt)

static void handle___kvm_vcpu_run(struct kvm_cpu_context *host_ctxt)

{

	unsigned long ret = 0;

	DECLARE_REG(struct kvm_vcpu *, vcpu, host_ctxt, 1);



	switch (func_id) {

	case KVM_HOST_SMCCC_FUNC(__kvm_vcpu_run): {

		unsigned long r1 = host_ctxt->regs.regs[1];

		struct kvm_vcpu *vcpu = (struct kvm_vcpu *)r1;



		ret = __kvm_vcpu_run(kern_hyp_va(vcpu));

		break;

	cpu_reg(host_ctxt, 1) =  __kvm_vcpu_run(kern_hyp_va(vcpu));

}

	case KVM_HOST_SMCCC_FUNC(__kvm_flush_vm_context):



static void handle___kvm_flush_vm_context(struct kvm_cpu_context *host_ctxt)

{

	__kvm_flush_vm_context();

		break;

	case KVM_HOST_SMCCC_FUNC(__kvm_tlb_flush_vmid_ipa): {

		unsigned long r1 = host_ctxt->regs.regs[1];

		struct kvm_s2_mmu *mmu = (struct kvm_s2_mmu *)r1;

		phys_addr_t ipa = host_ctxt->regs.regs[2];

		int level = host_ctxt->regs.regs[3];

}



static void handle___kvm_tlb_flush_vmid_ipa(struct kvm_cpu_context *host_ctxt)

{

	DECLARE_REG(struct kvm_s2_mmu *, mmu, host_ctxt, 1);

	DECLARE_REG(phys_addr_t, ipa, host_ctxt, 2);

	DECLARE_REG(int, level, host_ctxt, 3);



	__kvm_tlb_flush_vmid_ipa(kern_hyp_va(mmu), ipa, level);

		break;

}

	case KVM_HOST_SMCCC_FUNC(__kvm_tlb_flush_vmid): {

		unsigned long r1 = host_ctxt->regs.regs[1];

		struct kvm_s2_mmu *mmu = (struct kvm_s2_mmu *)r1;



static void handle___kvm_tlb_flush_vmid(struct kvm_cpu_context *host_ctxt)

{

	DECLARE_REG(struct kvm_s2_mmu *, mmu, host_ctxt, 1);



	__kvm_tlb_flush_vmid(kern_hyp_va(mmu));

		break;

}

	case KVM_HOST_SMCCC_FUNC(__kvm_tlb_flush_local_vmid): {

		unsigned long r1 = host_ctxt->regs.regs[1];

		struct kvm_s2_mmu *mmu = (struct kvm_s2_mmu *)r1;



static void handle___kvm_tlb_flush_local_vmid(struct kvm_cpu_context *host_ctxt)

{

	DECLARE_REG(struct kvm_s2_mmu *, mmu, host_ctxt, 1);



	__kvm_tlb_flush_local_vmid(kern_hyp_va(mmu));

		break;

}

	case KVM_HOST_SMCCC_FUNC(__kvm_timer_set_cntvoff): {

		u64 cntvoff = host_ctxt->regs.regs[1];



		__kvm_timer_set_cntvoff(cntvoff);

		break;

static void handle___kvm_timer_set_cntvoff(struct kvm_cpu_context *host_ctxt)

{

	__kvm_timer_set_cntvoff(cpu_reg(host_ctxt, 1));

}

	case KVM_HOST_SMCCC_FUNC(__kvm_enable_ssbs):



static void handle___kvm_enable_ssbs(struct kvm_cpu_context *host_ctxt)

{

	__kvm_enable_ssbs();

		break;

	case KVM_HOST_SMCCC_FUNC(__vgic_v3_get_ich_vtr_el2):

		ret = __vgic_v3_get_ich_vtr_el2();

		break;

	case KVM_HOST_SMCCC_FUNC(__vgic_v3_read_vmcr):

		ret = __vgic_v3_read_vmcr();

		break;

	case KVM_HOST_SMCCC_FUNC(__vgic_v3_write_vmcr): {

		u32 vmcr = host_ctxt->regs.regs[1];



		__vgic_v3_write_vmcr(vmcr);

		break;

	}

	case KVM_HOST_SMCCC_FUNC(__vgic_v3_init_lrs):

}



static void handle___vgic_v3_get_ich_vtr_el2(struct kvm_cpu_context *host_ctxt)

{

	cpu_reg(host_ctxt, 1) = __vgic_v3_get_ich_vtr_el2();

}



static void handle___vgic_v3_read_vmcr(struct kvm_cpu_context *host_ctxt)

{

	cpu_reg(host_ctxt, 1) = __vgic_v3_read_vmcr();

}



static void handle___vgic_v3_write_vmcr(struct kvm_cpu_context *host_ctxt)

{

	__vgic_v3_write_vmcr(cpu_reg(host_ctxt, 1));

}



static void handle___vgic_v3_init_lrs(struct kvm_cpu_context *host_ctxt)

{

	__vgic_v3_init_lrs();

		break;

	case KVM_HOST_SMCCC_FUNC(__kvm_get_mdcr_el2):

		ret = __kvm_get_mdcr_el2();

		break;

	case KVM_HOST_SMCCC_FUNC(__vgic_v3_save_aprs): {

		unsigned long r1 = host_ctxt->regs.regs[1];

		struct vgic_v3_cpu_if *cpu_if = (struct vgic_v3_cpu_if *)r1;

}



static void handle___kvm_get_mdcr_el2(struct kvm_cpu_context *host_ctxt)

{

	cpu_reg(host_ctxt, 1) = __kvm_get_mdcr_el2();

}



static void handle___vgic_v3_save_aprs(struct kvm_cpu_context *host_ctxt)

{

	DECLARE_REG(struct vgic_v3_cpu_if *, cpu_if, host_ctxt, 1);



	__vgic_v3_save_aprs(kern_hyp_va(cpu_if));

		break;

}

	case KVM_HOST_SMCCC_FUNC(__vgic_v3_restore_aprs): {

		unsigned long r1 = host_ctxt->regs.regs[1];

		struct vgic_v3_cpu_if *cpu_if = (struct vgic_v3_cpu_if *)r1;



static void handle___vgic_v3_restore_aprs(struct kvm_cpu_context *host_ctxt)

{

	DECLARE_REG(struct vgic_v3_cpu_if *, cpu_if, host_ctxt, 1);



	__vgic_v3_restore_aprs(kern_hyp_va(cpu_if));

		break;

	}

	default:

		/* Invalid host HVC. */

		host_ctxt->regs.regs[0] = SMCCC_RET_NOT_SUPPORTED;

		return;

}



	host_ctxt->regs.regs[0] = SMCCC_RET_SUCCESS;

	host_ctxt->regs.regs[1] = ret;

typedef void (*hcall_t)(struct kvm_cpu_context *);



#define HANDLE_FUNC(x)	[__KVM_HOST_SMCCC_FUNC_##x] = kimg_fn_ptr(handle_##x)



static const hcall_t *host_hcall[] = {

	HANDLE_FUNC(__kvm_vcpu_run),

	HANDLE_FUNC(__kvm_flush_vm_context),

	HANDLE_FUNC(__kvm_tlb_flush_vmid_ipa),

	HANDLE_FUNC(__kvm_tlb_flush_vmid),

	HANDLE_FUNC(__kvm_tlb_flush_local_vmid),

	HANDLE_FUNC(__kvm_timer_set_cntvoff),

	HANDLE_FUNC(__kvm_enable_ssbs),

	HANDLE_FUNC(__vgic_v3_get_ich_vtr_el2),

	HANDLE_FUNC(__vgic_v3_read_vmcr),

	HANDLE_FUNC(__vgic_v3_write_vmcr),

	HANDLE_FUNC(__vgic_v3_init_lrs),

	HANDLE_FUNC(__kvm_get_mdcr_el2),

	HANDLE_FUNC(__vgic_v3_save_aprs),

	HANDLE_FUNC(__vgic_v3_restore_aprs),

};



static void handle_host_hcall(struct kvm_cpu_context *host_ctxt)

{

	DECLARE_REG(unsigned long, id, host_ctxt, 0);

	const hcall_t *kfn;

	hcall_t hfn;



	id -= KVM_HOST_SMCCC_ID(0);



	if (unlikely(id >= ARRAY_SIZE(host_hcall)))

		goto inval;



	kfn = host_hcall[id];

	if (unlikely(!kfn))

		goto inval;



	cpu_reg(host_ctxt, 0) = SMCCC_RET_SUCCESS;



	hfn = kimg_fn_hyp_va(kfn);

	hfn(host_ctxt);



	return;

inval:

	cpu_reg(host_ctxt, 0) = SMCCC_RET_NOT_SUPPORTED;

}



void handle_trap(struct kvm_cpu_context *host_ctxt)

{

	u64 esr = read_sysreg_el2(SYS_ESR);

	unsigned long func_id;



	if (ESR_ELx_EC(esr) != ESR_ELx_EC_HVC64)

	if (unlikely(ESR_ELx_EC(esr) != ESR_ELx_EC_HVC64))

		hyp_panic();



	func_id = host_ctxt->regs.regs[0];

	handle_host_hcall(func_id, host_ctxt);

	handle_host_hcall(host_ctxt);

}

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