Commit 7cc6e315 authored by Pierre-Louis Bossart's avatar Pierre-Louis Bossart Committed by Greg Kroah-Hartman
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soundwire: intel: protect macro parameters 



Extra parentheses required here

Reviewed-by: default avatarTakashi Iwai <tiwai@suse.de>
Signed-off-by: default avatarPierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent d542bc9e

drivers/soundwire/intel.c

+13 −13
Original line number Diff line number Diff line
@@ -24,18 +24,18 @@ 
#define SDW_SHIM_IPPTR			0x8

#define SDW_SHIM_SYNC			0xC



#define SDW_SHIM_CTLSCAP(x)		(0x010 + 0x60 * x)

#define SDW_SHIM_CTLS0CM(x)		(0x012 + 0x60 * x)

#define SDW_SHIM_CTLS1CM(x)		(0x014 + 0x60 * x)

#define SDW_SHIM_CTLS2CM(x)		(0x016 + 0x60 * x)

#define SDW_SHIM_CTLS3CM(x)		(0x018 + 0x60 * x)

#define SDW_SHIM_PCMSCAP(x)		(0x020 + 0x60 * x)



#define SDW_SHIM_PCMSYCHM(x, y)		(0x022 + (0x60 * x) + (0x2 * y))

#define SDW_SHIM_PCMSYCHC(x, y)		(0x042 + (0x60 * x) + (0x2 * y))

#define SDW_SHIM_PDMSCAP(x)		(0x062 + 0x60 * x)

#define SDW_SHIM_IOCTL(x)		(0x06C + 0x60 * x)

#define SDW_SHIM_CTMCTL(x)		(0x06E + 0x60 * x)

#define SDW_SHIM_CTLSCAP(x)		(0x010 + 0x60 * (x))

#define SDW_SHIM_CTLS0CM(x)		(0x012 + 0x60 * (x))

#define SDW_SHIM_CTLS1CM(x)		(0x014 + 0x60 * (x))

#define SDW_SHIM_CTLS2CM(x)		(0x016 + 0x60 * (x))

#define SDW_SHIM_CTLS3CM(x)		(0x018 + 0x60 * (x))

#define SDW_SHIM_PCMSCAP(x)		(0x020 + 0x60 * (x))



#define SDW_SHIM_PCMSYCHM(x, y)		(0x022 + (0x60 * (x)) + (0x2 * (y)))

#define SDW_SHIM_PCMSYCHC(x, y)		(0x042 + (0x60 * (x)) + (0x2 * (y)))

#define SDW_SHIM_PDMSCAP(x)		(0x062 + 0x60 * (x))

#define SDW_SHIM_IOCTL(x)		(0x06C + 0x60 * (x))

#define SDW_SHIM_CTMCTL(x)		(0x06E + 0x60 * (x))



#define SDW_SHIM_WAKEEN			0x190

#define SDW_SHIM_WAKESTS		0x192
@@ -82,7 +82,7 @@ 
#define SDW_SHIM_WAKESTS_STATUS		BIT(0)



/* Intel ALH Register definitions */

#define SDW_ALH_STRMZCFG(x)		(0x000 + (0x4 * x))

#define SDW_ALH_STRMZCFG(x)		(0x000 + (0x4 * (x)))



#define SDW_ALH_STRMZCFG_DMAT_VAL	0x3

#define SDW_ALH_STRMZCFG_DMAT		GENMASK(7, 0)

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