drm/i915: Restore vblank interrupts earlier (7cada4d0) · Commits · 戴 / test

drivers/gpu/drm/i915/intel_display.c

+13 −10

Original line number	Diff line number	Diff line
		@@ -15526,13 +15526,9 @@ static void intel_sanitize_crtc(struct intel_crtc *crtc,
		I915_READ(reg) & ~PIPECONF_FRAME_START_DELAY_MASK);
		}

		/* restore vblank interrupts to correct state */
		drm_crtc_vblank_reset(&crtc->base);
		if (crtc->active) {
		struct intel_plane *plane;

		drm_crtc_vblank_on(&crtc->base);

		/* Disable everything but the primary plane */
		for_each_intel_plane_on_crtc(dev, crtc, plane) {
		const struct intel_plane_state *plane_state =
		@@ -15874,7 +15870,6 @@ intel_modeset_setup_hw_state(struct drm_device *dev,
		struct drm_modeset_acquire_ctx *ctx)
		{
		struct drm_i915_private *dev_priv = to_i915(dev);
		enum pipe pipe;
		struct intel_crtc *crtc;
		struct intel_encoder *encoder;
		int i;
		@@ -15887,15 +15882,23 @@ intel_modeset_setup_hw_state(struct drm_device *dev,
		/* HW state is read out, now we need to sanitize this mess. */
		get_encoder_power_domains(dev_priv);

		intel_sanitize_plane_mapping(dev_priv);
		/*
		* intel_sanitize_plane_mapping() may need to do vblank
		* waits, so we need vblank interrupts restored beforehand.
		*/
		for_each_intel_crtc(&dev_priv->drm, crtc) {
		drm_crtc_vblank_reset(&crtc->base);

		for_each_intel_encoder(dev, encoder) {
		intel_sanitize_encoder(encoder);
		if (crtc->active)
		drm_crtc_vblank_on(&crtc->base);
		}

		for_each_pipe(dev_priv, pipe) {
		crtc = intel_get_crtc_for_pipe(dev_priv, pipe);
		intel_sanitize_plane_mapping(dev_priv);

		for_each_intel_encoder(dev, encoder)
		intel_sanitize_encoder(encoder);

		for_each_intel_crtc(&dev_priv->drm, crtc) {
		intel_sanitize_crtc(crtc, ctx);
		intel_dump_pipe_config(crtc, crtc->config,
		"[setup_hw_state]");

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