ARM: dts: am437x-l4: add dt node for new cpsw switchdev driver

					phys = <&phy_gmii_sel 2 0>;

				};

			};

			mac_sw: switch@0 {

				compatible = "ti,am4372-cpsw","ti,cpsw-switch";

				reg = <0x0 0x4000>;

				ranges = <0 0 0x4000>;

				clocks = <&cpsw_125mhz_gclk>, <&dpll_clksel_mac_clk>;

				clock-names = "fck", "50mclk";

				assigned-clocks = <&dpll_clksel_mac_clk>;

				assigned-clock-rates = <50000000>;

				#address-cells = <1>;

				#size-cells = <1>;

				syscon = <&scm_conf>;

				status = "disabled";

				interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH

					      GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH

					      GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH

					      GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;

				interrupt-names = "rx_thresh", "rx", "tx", "misc";

				ethernet-ports {

					#address-cells = <1>;

					#size-cells = <0>;

					cpsw_port1: port@1 {

						reg = <1>;

						label = "port1";

						mac-address = [ 00 00 00 00 00 00 ];

						phys = <&phy_gmii_sel 1 0>;

					};

					cpsw_port2: port@2 {

						reg = <2>;

						label = "port2";

						mac-address = [ 00 00 00 00 00 00 ];

						phys = <&phy_gmii_sel 2 0>;

					};

				};

				davinci_mdio_sw: mdio@1000 {

					compatible = "ti,am4372-mdio", "ti,cpsw-mdio","ti,davinci_mdio";

					clocks = <&cpsw_125mhz_gclk>;

					clock-names = "fck";

					#address-cells = <1>;

					#size-cells = <0>;

					bus_freq = <1000000>;

					reg = <0x1000 0x100>;

				};

				cpts {

					clocks = <&cpsw_cpts_rft_clk>;

					clock-names = "cpts";

				};

			};

		};

		target-module@200000 {			/* 0x4a200000, ap 7 02.0 */