Commit 7bd9e25f authored by Ido Yariv's avatar Ido Yariv Committed by Tony Lindgren
Browse files

ARM: OMAP2+: Make some definitions local 



Move some of the definitions in omap-iommu.h that can be made local to
either drivers/iommu.

Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: Mauro Carvalho Chehab <mchehab@infradead.org>
Cc: Omar Ramirez Luna <omar.luna@linaro.org>
Signed-off-by: default avatarIdo Yariv <ido@wizery.com>
Acked-by: default avatarOhad Ben-Cohen <ohad@wizery.com>
Acked-by: default avatarJoerg Roedel <joro@8bytes.org>
[tony@atomide.com: updated for header changes in the series]
Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
parent ed1c7de2

drivers/iommu/omap-iommu.c

+15 −0
Original line number Diff line number Diff line
@@ -54,6 +54,21 @@ struct omap_iommu_domain { 
	spinlock_t lock;

};



#define MMU_LOCK_BASE_SHIFT	10

#define MMU_LOCK_BASE_MASK	(0x1f << MMU_LOCK_BASE_SHIFT)

#define MMU_LOCK_BASE(x)	\

	((x & MMU_LOCK_BASE_MASK) >> MMU_LOCK_BASE_SHIFT)



#define MMU_LOCK_VICT_SHIFT	4

#define MMU_LOCK_VICT_MASK	(0x1f << MMU_LOCK_VICT_SHIFT)

#define MMU_LOCK_VICT(x)	\

	((x & MMU_LOCK_VICT_MASK) >> MMU_LOCK_VICT_SHIFT)



struct iotlb_lock {

	short base;

	short vict;

};



/* accommodate the difference between omap1 and omap2/3 */

static const struct iommu_functions *arch_iommu;

drivers/iommu/omap-iommu.h

+3 −30
Original line number Diff line number Diff line
@@ -72,11 +72,6 @@ struct cr_regs { 
	};

};



struct iotlb_lock {

	short base;

	short vict;

};



/* architecture specific functions */

struct iommu_functions {

	unsigned long	version;
@@ -117,13 +112,6 @@ static inline struct omap_iommu *dev_to_omap_iommu(struct device *dev) 
}

#endif



/* IOMMU errors */

#define OMAP_IOMMU_ERR_TLB_MISS		(1 << 0)

#define OMAP_IOMMU_ERR_TRANS_FAULT	(1 << 1)

#define OMAP_IOMMU_ERR_EMU_MISS		(1 << 2)

#define OMAP_IOMMU_ERR_TBLWALK_FAULT	(1 << 3)

#define OMAP_IOMMU_ERR_MULTIHIT_FAULT	(1 << 4)



/*

 * MMU Register offsets

 */
@@ -151,16 +139,6 @@ static inline struct omap_iommu *dev_to_omap_iommu(struct device *dev) 
/*

 * MMU Register bit definitions

 */

#define MMU_LOCK_BASE_SHIFT	10

#define MMU_LOCK_BASE_MASK	(0x1f << MMU_LOCK_BASE_SHIFT)

#define MMU_LOCK_BASE(x)	\

	((x & MMU_LOCK_BASE_MASK) >> MMU_LOCK_BASE_SHIFT)



#define MMU_LOCK_VICT_SHIFT	4

#define MMU_LOCK_VICT_MASK	(0x1f << MMU_LOCK_VICT_SHIFT)

#define MMU_LOCK_VICT(x)	\

	((x & MMU_LOCK_VICT_MASK) >> MMU_LOCK_VICT_SHIFT)



#define MMU_CAM_VATAG_SHIFT	12

#define MMU_CAM_VATAG_MASK \

	((~0UL >> MMU_CAM_VATAG_SHIFT) << MMU_CAM_VATAG_SHIFT)
@@ -222,20 +200,15 @@ extern void omap_iotlb_cr_to_e(struct cr_regs *cr, struct iotlb_entry *e); 
extern int

omap_iopgtable_store_entry(struct omap_iommu *obj, struct iotlb_entry *e);



extern int omap_iommu_set_isr(const char *name,

		 int (*isr)(struct omap_iommu *obj, u32 da, u32 iommu_errs,

				    void *priv),

			 void *isr_priv);



extern void omap_iommu_save_ctx(struct device *dev);

extern void omap_iommu_restore_ctx(struct device *dev);



extern int omap_install_iommu_arch(const struct iommu_functions *ops);

extern void omap_uninstall_iommu_arch(const struct iommu_functions *ops);



extern int omap_foreach_iommu_device(void *data,

				int (*fn)(struct device *, void *));



extern int omap_install_iommu_arch(const struct iommu_functions *ops);

extern void omap_uninstall_iommu_arch(const struct iommu_functions *ops);



extern ssize_t

omap_iommu_dump_ctx(struct omap_iommu *obj, char *buf, ssize_t len);

extern size_t

drivers/iommu/omap-iommu2.c

+6 −0
Original line number Diff line number Diff line
@@ -68,6 +68,12 @@ 
	 ((pgsz) == MMU_CAM_PGSZ_64K) ? 0xffff0000 :	\

	 ((pgsz) == MMU_CAM_PGSZ_4K)  ? 0xfffff000 : 0)



/* IOMMU errors */

#define OMAP_IOMMU_ERR_TLB_MISS		(1 << 0)

#define OMAP_IOMMU_ERR_TRANS_FAULT	(1 << 1)

#define OMAP_IOMMU_ERR_EMU_MISS		(1 << 2)

#define OMAP_IOMMU_ERR_TBLWALK_FAULT	(1 << 3)

#define OMAP_IOMMU_ERR_MULTIHIT_FAULT	(1 << 4)



static void __iommu_set_twl(struct omap_iommu *obj, bool on)

{

CRA Git | Maintained and supported by SUSTech CRA and CCSE