Commit 7bc6be82 authored by Christian König's avatar Christian König Committed by Alex Deucher
Browse files

drm/amdgpu: remove explicit NULL init for parse_cs 



sed -i "/\.parse_cs = NULL,/d" drivers/gpu/drm/amd/amdgpu/*.c

That's just a leftover from radeon.

Signed-off-by: default avatarChristian König <christian.koenig@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent e08c90a7

drivers/gpu/drm/amd/amdgpu/cik_sdma.c

+0 −1
Original line number Diff line number Diff line
@@ -1228,7 +1228,6 @@ static const struct amdgpu_ring_funcs cik_sdma_ring_funcs = { 
	.get_rptr = cik_sdma_ring_get_rptr,

	.get_wptr = cik_sdma_ring_get_wptr,

	.set_wptr = cik_sdma_ring_set_wptr,

	.parse_cs = NULL,

	.emit_ib = cik_sdma_ring_emit_ib,

	.emit_fence = cik_sdma_ring_emit_fence,

	.emit_pipeline_sync = cik_sdma_ring_emit_pipeline_sync,

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

+0 −2
Original line number Diff line number Diff line
@@ -3258,7 +3258,6 @@ static const struct amdgpu_ring_funcs gfx_v6_0_ring_funcs_gfx = { 
	.get_rptr = gfx_v6_0_ring_get_rptr,

	.get_wptr = gfx_v6_0_ring_get_wptr,

	.set_wptr = gfx_v6_0_ring_set_wptr_gfx,

	.parse_cs = NULL,

	.emit_ib = gfx_v6_0_ring_emit_ib,

	.emit_fence = gfx_v6_0_ring_emit_fence,

	.emit_pipeline_sync = gfx_v6_0_ring_emit_pipeline_sync,
@@ -3277,7 +3276,6 @@ static const struct amdgpu_ring_funcs gfx_v6_0_ring_funcs_compute = { 
	.get_rptr = gfx_v6_0_ring_get_rptr,

	.get_wptr = gfx_v6_0_ring_get_wptr,

	.set_wptr = gfx_v6_0_ring_set_wptr_compute,

	.parse_cs = NULL,

	.emit_ib = gfx_v6_0_ring_emit_ib,

	.emit_fence = gfx_v6_0_ring_emit_fence,

	.emit_pipeline_sync = gfx_v6_0_ring_emit_pipeline_sync,

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

+0 −2
Original line number Diff line number Diff line
@@ -5147,7 +5147,6 @@ static const struct amdgpu_ring_funcs gfx_v7_0_ring_funcs_gfx = { 
	.get_rptr = gfx_v7_0_ring_get_rptr,

	.get_wptr = gfx_v7_0_ring_get_wptr_gfx,

	.set_wptr = gfx_v7_0_ring_set_wptr_gfx,

	.parse_cs = NULL,

	.emit_ib = gfx_v7_0_ring_emit_ib_gfx,

	.emit_fence = gfx_v7_0_ring_emit_fence_gfx,

	.emit_pipeline_sync = gfx_v7_0_ring_emit_pipeline_sync,
@@ -5168,7 +5167,6 @@ static const struct amdgpu_ring_funcs gfx_v7_0_ring_funcs_compute = { 
	.get_rptr = gfx_v7_0_ring_get_rptr,

	.get_wptr = gfx_v7_0_ring_get_wptr_compute,

	.set_wptr = gfx_v7_0_ring_set_wptr_compute,

	.parse_cs = NULL,

	.emit_ib = gfx_v7_0_ring_emit_ib_compute,

	.emit_fence = gfx_v7_0_ring_emit_fence_compute,

	.emit_pipeline_sync = gfx_v7_0_ring_emit_pipeline_sync,

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

+0 −2
Original line number Diff line number Diff line
@@ -6568,7 +6568,6 @@ static const struct amdgpu_ring_funcs gfx_v8_0_ring_funcs_gfx = { 
	.get_rptr = gfx_v8_0_ring_get_rptr,

	.get_wptr = gfx_v8_0_ring_get_wptr_gfx,

	.set_wptr = gfx_v8_0_ring_set_wptr_gfx,

	.parse_cs = NULL,

	.emit_ib = gfx_v8_0_ring_emit_ib_gfx,

	.emit_fence = gfx_v8_0_ring_emit_fence_gfx,

	.emit_pipeline_sync = gfx_v8_0_ring_emit_pipeline_sync,
@@ -6590,7 +6589,6 @@ static const struct amdgpu_ring_funcs gfx_v8_0_ring_funcs_compute = { 
	.get_rptr = gfx_v8_0_ring_get_rptr,

	.get_wptr = gfx_v8_0_ring_get_wptr_compute,

	.set_wptr = gfx_v8_0_ring_set_wptr_compute,

	.parse_cs = NULL,

	.emit_ib = gfx_v8_0_ring_emit_ib_compute,

	.emit_fence = gfx_v8_0_ring_emit_fence_compute,

	.emit_pipeline_sync = gfx_v8_0_ring_emit_pipeline_sync,

drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c

+0 −1
Original line number Diff line number Diff line
@@ -1225,7 +1225,6 @@ static const struct amdgpu_ring_funcs sdma_v2_4_ring_funcs = { 
	.get_rptr = sdma_v2_4_ring_get_rptr,

	.get_wptr = sdma_v2_4_ring_get_wptr,

	.set_wptr = sdma_v2_4_ring_set_wptr,

	.parse_cs = NULL,

	.emit_ib = sdma_v2_4_ring_emit_ib,

	.emit_fence = sdma_v2_4_ring_emit_fence,

	.emit_pipeline_sync = sdma_v2_4_ring_emit_pipeline_sync,

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