clk: analogbits: add Wide-Range PLL library (7b9487a9) · Commits · 戴 / test

Add common library code for the Analog Bits Wide-Range PLL (WRPLL) IP block, as implemented in TSMC CLN28HPC. There is no bus interface or register target associated with this PLL. This library is intended to be used by drivers for IP blocks that expose registers connected to the PLL configuration and status signals. Based on code originally written by Wesley Terpstra <wesley@sifive.com>: https://github.com/riscv/riscv-linux/commit/999529edf517ed75b56659d456d221b2ee56bb60 This version incorporates several changes requested by Stephen Boyd <sboyd@kernel.org>. Signed-off-by:

Paul Walmsley <paul.walmsley@sifive.com> Signed-off-by:

Paul Walmsley <paul@pwsan.com> Cc: Wesley Terpstra <wesley@sifive.com> Cc: Palmer Dabbelt <palmer@sifive.com> Cc: Michael Turquette <mturquette@baylibre.com> Cc: Stephen Boyd <sboyd@kernel.org> Cc: Megan Wachs <megan@sifive.com> Cc: linux-clk@vger.kernel.org Cc: linux-kernel@vger.kernel.org [sboyd@kernel.org: Fix some const issues] Signed-off-by:

Stephen Boyd <sboyd@kernel.org>

MAINTAINERS

+6 −0

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		@@ -960,6 +960,12 @@ F: drivers/iio/adc/ltc2497*
		X: drivers/iio//adjd
		F: drivers/staging/iio//ad

		ANALOGBITS PLL LIBRARIES
		M: Paul Walmsley <paul.walmsley@sifive.com>
		S: Supported
		F: drivers/clk/analogbits/*
		F: include/linux/clk/analogbits*

		ANDES ARCHITECTURE
		M: Greentime Hu <green.hu@gmail.com>
		M: Vincent Chen <deanbo422@gmail.com>

drivers/clk/Kconfig

+2 −0

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		# SPDX-License-Identifier: GPL-2.0

		config CLKDEV_LOOKUP
		bool
		@@ -297,6 +298,7 @@ config COMMON_CLK_FIXED_MMIO
		Support for Memory Mapped IO Fixed clocks

		source "drivers/clk/actions/Kconfig"
		source "drivers/clk/analogbits/Kconfig"
		source "drivers/clk/bcm/Kconfig"
		source "drivers/clk/hisilicon/Kconfig"
		source "drivers/clk/imgtec/Kconfig"

drivers/clk/Makefile

+1 −0

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		@@ -64,6 +64,7 @@ obj-$(CONFIG_COMMON_CLK_XGENE) += clk-xgene.o

		# please keep this section sorted lexicographically by directory path name
		obj-y += actions/
		obj-y += analogbits/
		obj-$(CONFIG_COMMON_CLK_AT91) += at91/
		obj-$(CONFIG_ARCH_ARTPEC) += axis/
		obj-$(CONFIG_ARC_PLAT_AXS10X) += axs10x/

drivers/clk/analogbits/Kconfig

0 → 100644

+2 −0

Original line number	Diff line number	Diff line
		config CLK_ANALOGBITS_WRPLL_CLN28HPC
		bool

drivers/clk/analogbits/Makefile

0 → 100644

+3 −0

Original line number	Diff line number	Diff line
		# SPDX-License-Identifier: GPL-2.0

		obj-$(CONFIG_CLK_ANALOGBITS_WRPLL_CLN28HPC) += wrpll-cln28hpc.o

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