Commit 7b6ac9df authored Nov 23, 2005 by Hugh Dickins Committed by Linus Torvalds Nov 23, 2005

[PATCH] mm: update split ptlock Kconfig

Closer attention to the arithmetic shows that neither ppc64 nor sparc really
uses one page for multiple page tables: how on earth could they, while
pte_alloc_one returns just a struct page pointer, with no offset?

Well, arm26 manages it by returning a pte_t pointer cast to a struct page
pointer, harumph, then compensating in its pmd_populate. But arm26 is never
SMP, so it's not a problem for split ptlock either.

And the PA-RISC situation has been recently improved: CONFIG_PA20 works
without the 16-byte alignment which inflated its spinlock_t. But the current
union of spinlock_t with private does make the 7xxx struct page significantly
larger, even without debug, so disable its split ptlock.

Signed-off-by: Hugh Dickins <hugh@veritas.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

parent c101e773

mm/Kconfig

+2 −4

Original line number	Diff line number	Diff line
		@@ -125,12 +125,10 @@ comment "Memory hotplug is currently incompatible with Software Suspend"
		# space can be handled with less contention: split it at this NR_CPUS.
		# Default to 4 for wider testing, though 8 might be more appropriate.
		# ARM's adjust_pte (unused if VIPT) depends on mm-wide page_table_lock.
		# PA-RISC's debug spinlock_t is too large for the 32-bit struct page.
		# ARM26 and SPARC32 and PPC64 may use one page for multiple page tables.
		# PA-RISC 7xxx's spinlock_t would enlarge struct page from 32 to 44 bytes.
		#
		config SPLIT_PTLOCK_CPUS
		int
		default "4096" if ARM && !CPU_CACHE_VIPT
		default "4096" if PARISC && DEBUG_SPINLOCK && !64BIT
		default "4096" if ARM26 \|\| SPARC32 \|\| PPC64
		default "4096" if PARISC && !PA20
		default "4"

Admin message