KVM: nVMX: fix nested EPT detection (7ad658b6) · Commits · 戴 / test

The nested_ept_enabled flag introduced in commit was not computed correctly. We are interested only in L1's EPT state, not the the combined L0+L1 value. In particular, if L0 uses EPT but L1 does not, nested_ept_enabled must be false to make sure that PDPSTRs are loaded based on CR3 as usual, because the special case described in 26.3.2.4 Loading Page-Directory- Pointer-Table Entries does not apply. Fixes: ("KVM: nVMX: fix CR3 load if L2 uses PAE paging and EPT") Cc: qemu-stable@nongnu.org Reported-by:

Wanpeng Li <wanpeng.li@hotmail.com> Reviewed-by:

David Hildenbrand <david@redhat.com> Signed-off-by:

Ladi Prosek <lprosek@redhat.com> Signed-off-by:

Paolo Bonzini <pbonzini@redhat.com>

arch/x86/kvm/vmx.c

+1 −4

Original line number	Diff line number	Diff line
		@@ -9992,7 +9992,6 @@ static int prepare_vmcs02(struct kvm_vcpu vcpu, struct vmcs12 vmcs12,
		{
		struct vcpu_vmx *vmx = to_vmx(vcpu);
		u32 exec_control;
		bool nested_ept_enabled = false;

		vmcs_write16(GUEST_ES_SELECTOR, vmcs12->guest_es_selector);
		vmcs_write16(GUEST_CS_SELECTOR, vmcs12->guest_cs_selector);
		@@ -10139,8 +10138,6 @@ static int prepare_vmcs02(struct kvm_vcpu vcpu, struct vmcs12 vmcs12,
		vmcs12->guest_intr_status);
		}

		nested_ept_enabled = (exec_control & SECONDARY_EXEC_ENABLE_EPT) != 0;

		/*
		* Write an illegal value to APIC_ACCESS_ADDR. Later,
		* nested_get_vmcs12_pages will either fix it up or
		@@ -10303,7 +10300,7 @@ static int prepare_vmcs02(struct kvm_vcpu vcpu, struct vmcs12 vmcs12,
		vmx_set_efer(vcpu, vcpu->arch.efer);

		/* Shadow page tables on either EPT or shadow page tables. */
		if (nested_vmx_load_cr3(vcpu, vmcs12->guest_cr3, nested_ept_enabled,
		if (nested_vmx_load_cr3(vcpu, vmcs12->guest_cr3, nested_cpu_has_ept(vmcs12),
		entry_failure_code))
		return 1;

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