Commit 7a7e3472 authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'fixes-3.10-2' of git://git.infradead.org/users/jcooper/linux into fixes 

From Jason Cooper, mvebu fixes for v3.10 (round 2):
 - mvebu (and orion SoCs)
    - remove init_dma_coherent_pool_size()
 - mvebu
    - fix ranges DT property
    - fix DT reg value for L2 cache
    - select ARCH_REQUIRE_GPIOLIB
 - orion legacy
    - fix num_resources and id for ge10 and ge11

* tag 'fixes-3.10-2' of git://git.infradead.org/users/jcooper/linux

:
  ARM: dts: mvebu: Fix wrong the address reg value for the L2-cache node
  ARM: plat-orion: Fix num_resources and id for ge10 and ge11
  arm: mvebu: fix the 'ranges' property to handle PCIe
  ARM: mvebu: select ARCH_REQUIRE_GPIOLIB for mvebu platform
  ARM: mvebu: Fix ranges entry on XP GP board
  ARM: Orion: Remove redundant init_dma_coherent_pool_size()

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 7ad915f5 489e138e

arch/arm/boot/dts/armada-370-xp.dtsi

+2 −1
Original line number Diff line number Diff line
@@ -33,7 +33,8 @@ 
		#size-cells = <1>;

		compatible = "simple-bus";

		interrupt-parent = <&mpic>;

		ranges = <0 0 0xd0000000 0x100000>;

		ranges = <0          0 0xd0000000 0x0100000 /* internal registers */

			  0xe0000000 0 0xe0000000 0x8100000 /* PCIe */>;



		internal-regs {

			compatible = "simple-bus";

arch/arm/boot/dts/armada-370.dtsi

+3 −2
Original line number Diff line number Diff line
@@ -29,7 +29,8 @@ 
	};



	soc {

		ranges = <0 0xd0000000 0x100000>;

		ranges = <0          0xd0000000 0x0100000 /* internal registers */

			  0xe0000000 0xe0000000 0x8100000 /* PCIe */>;

		internal-regs {

			system-controller@18200 {

				compatible = "marvell,armada-370-xp-system-controller";
@@ -38,7 +39,7 @@ 


			L2: l2-cache {

				compatible = "marvell,aurora-outer-cache";

				reg = <0xd0008000 0x1000>;

				reg = <0x08000 0x1000>;

				cache-id-part = <0x100>;

				wt-override;

			};

arch/arm/boot/dts/armada-xp-gp.dts

+3 −0
Original line number Diff line number Diff line
@@ -39,6 +39,9 @@ 
	};



	soc {

		ranges = <0          0 0xd0000000 0x100000

			  0xf0000000 0 0xf0000000 0x1000000>;



		internal-regs {

			serial@12000 {

				clock-frequency = <250000000>;

arch/arm/mach-kirkwood/common.c

+0 −6
Original line number Diff line number Diff line
@@ -528,12 +528,6 @@ void __init kirkwood_init_early(void) 
{

	orion_time_set_base(TIMER_VIRT_BASE);



	/*

	 * Some Kirkwood devices allocate their coherent buffers from atomic

	 * context. Increase size of atomic coherent pool to make sure such

	 * the allocations won't fail.

	 */

	init_dma_coherent_pool_size(SZ_1M);

	mvebu_mbus_init("marvell,kirkwood-mbus",

			BRIDGE_WINS_BASE, BRIDGE_WINS_SZ,

			DDR_WINDOW_CPU_BASE, DDR_WINDOW_CPU_SZ);

arch/arm/mach-mvebu/Kconfig

+1 −0
Original line number Diff line number Diff line
@@ -15,6 +15,7 @@ config ARCH_MVEBU 
	select MVEBU_CLK_GATING

	select MVEBU_MBUS

	select ZONE_DMA if ARM_LPAE

	select ARCH_REQUIRE_GPIOLIB



if ARCH_MVEBU

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