Commit 7a1046e5 authored by Ian Abbott's avatar Ian Abbott Committed by Greg Kroah-Hartman
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staging: comedi: s626: replace S626_MULT_X? values



Replace the use of the `S626_MULT_X1`, `S626_MULT_X2` and `S626_MULT_X4`
clock multiplier values with the equivalent `S626_CLKMULT_1X`,
`S626_CLKMULT_2X` and `S626_CLKMULT_4X` values to avoid duplication.
Replace the use of `S626_MULT_X0` with a new macro
`S626_CLKMULT_SPECIAL` (this is treated specially by the
'ClkMultA'/'ClkMultB' field of the 'CRA'/'CRB' register).  Remove the
now unused `S626_MULT_X?` macros.

Signed-off-by: default avatarIan Abbott <abbotti@mev.co.uk>
Reviewed-by: default avatarH Hartley Sweeten <hsweeten@visionengravers.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 43ce748f
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+14 −14
Original line number Diff line number Diff line
@@ -731,7 +731,7 @@ static uint16_t s626_get_mode_a(struct comedi_device *dev,
		/* Set ClkPol to indicate count direction (CntSrcA<0>). */
		clkpol = cntsrc & 1;
		/* ClkMult must be 1x in Timer mode. */
		clkmult = S626_MULT_X1;
		clkmult = S626_CLKMULT_1X;
	} else {
		/* Counter mode (CntSrcA<1> == 0): */
		encmode = S626_ENCMODE_COUNTER;
@@ -739,8 +739,8 @@ static uint16_t s626_get_mode_a(struct comedi_device *dev,
		clkpol = S626_GET_CRA_CLKPOL_A(cra);
		/* Force ClkMult to 1x if not legal, else pass through. */
		clkmult = S626_GET_CRA_CLKMULT_A(cra);
		if (clkmult == S626_MULT_X0)
			clkmult = S626_MULT_X1;
		if (clkmult == S626_CLKMULT_SPECIAL)
			clkmult = S626_CLKMULT_1X;
	}
	setup |= S626_SET_STD_ENCMODE(encmode) | S626_SET_STD_CLKMULT(clkmult) |
		 S626_SET_STD_CLKPOL(clkpol);
@@ -781,18 +781,18 @@ static uint16_t s626_get_mode_b(struct comedi_device *dev,
	/* Adjust mode-dependent parameters. */
	cntsrc = S626_GET_CRA_CNTSRC_B(cra);
	clkmult = S626_GET_CRB_CLKMULT_B(crb);
	if (clkmult == S626_MULT_X0) {
		/* Extender mode (ClkMultB == S626_MULT_X0): */
	if (clkmult == S626_CLKMULT_SPECIAL) {
		/* Extender mode (ClkMultB == S626_CLKMULT_SPECIAL): */
		encmode = S626_ENCMODE_EXTENDER;
		/* Indicate multiplier is 1x. */
		clkmult = S626_MULT_X1;
		clkmult = S626_CLKMULT_1X;
		/* Set ClkPol equal to Timer count direction (CntSrcB<0>). */
		clkpol = cntsrc & 1;
	} else if (cntsrc & S626_CNTSRC_SYSCLK) {
		/* Timer mode (CntSrcB<1> == 1): */
		encmode = S626_ENCMODE_TIMER;
		/* Indicate multiplier is 1x. */
		clkmult = S626_MULT_X1;
		clkmult = S626_CLKMULT_1X;
		/* Set ClkPol equal to Timer count direction (CntSrcB<0>). */
		clkpol = cntsrc & 1;
	} else {
@@ -853,7 +853,7 @@ static void s626_set_mode_a(struct comedi_device *dev,
		/* ClkPolA behaves as always-on clock enable. */
		clkpol = 1;
		/* ClkMult must be 1x. */
		clkmult = S626_MULT_X1;
		clkmult = S626_CLKMULT_1X;
		break;
	default:		/* Counter Mode: */
		/* Select ENC_C and ENC_D as clock/direction inputs. */
@@ -861,8 +861,8 @@ static void s626_set_mode_a(struct comedi_device *dev,
		/* Clock polarity is passed through. */
		/* Force multiplier to x1 if not legal, else pass through. */
		clkmult = S626_GET_STD_CLKMULT(setup);
		if (clkmult == S626_MULT_X0)
			clkmult = S626_MULT_X1;
		if (clkmult == S626_CLKMULT_SPECIAL)
			clkmult = S626_CLKMULT_1X;
		break;
	}
	cra |= S626_SET_CRA_CNTSRC_A(cntsrc) | S626_SET_CRA_CLKPOL_A(clkpol) |
@@ -927,7 +927,7 @@ static void s626_set_mode_b(struct comedi_device *dev,
		/* ClkPolB behaves as always-on clock enable. */
		clkpol = 1;
		/* ClkMultB must be 1x. */
		clkmult = S626_MULT_X1;
		clkmult = S626_CLKMULT_1X;
		break;
	case S626_ENCMODE_EXTENDER:	/* Extender Mode: */
		/* CntSrcB source is OverflowA (same as "timer") */
@@ -937,7 +937,7 @@ static void s626_set_mode_b(struct comedi_device *dev,
		/* ClkPolB controls IndexB -- always set to active. */
		clkpol = 1;
		/* ClkMultB selects OverflowA as the clock source. */
		clkmult = S626_MULT_X0;
		clkmult = S626_CLKMULT_SPECIAL;
		break;
	default:		/* Counter Mode: */
		/* Select ENC_C and ENC_D as clock/direction inputs. */
@@ -945,8 +945,8 @@ static void s626_set_mode_b(struct comedi_device *dev,
		/* ClkPol is passed through. */
		/* Force ClkMult to x1 if not legal, otherwise pass through. */
		clkmult = S626_GET_STD_CLKMULT(setup);
		if (clkmult == S626_MULT_X0)
			clkmult = S626_MULT_X1;
		if (clkmult == S626_CLKMULT_SPECIAL)
			clkmult = S626_CLKMULT_1X;
		break;
	}
	cra |= S626_SET_CRA_CNTSRC_B(cntsrc);
+1 −11
Original line number Diff line number Diff line
@@ -498,17 +498,7 @@
#define S626_CLKMULT_4X		0	/* 4x clock multiplier. */
#define S626_CLKMULT_2X		1	/* 2x clock multiplier. */
#define S626_CLKMULT_1X		2	/* 1x clock multiplier. */

/* Enumerated counter clock multipliers. */

#define S626_MULT_X0		0x0003	/* Supports no multipliers;
					 * fixed physical multiplier = 3. */
#define S626_MULT_X1		0x0002	/* Supports multiplier x1;
					 * fixed physical multiplier = 2. */
#define S626_MULT_X2		0x0001	/* Supports multipliers x1, x2;
					 * physical multipliers = 1 or 2. */
#define S626_MULT_X4		0x0000	/* Supports multipliers x1, x2, x4;
					 * physical multipliers = 0, 1 or 2. */
#define S626_CLKMULT_SPECIAL	3	/* Special clock multiplier value. */

/* Sanity-check limits for parameters. */