ARM: pxa: reduce the scope of get_memclk_frequency_10khz() (799929d7) · Commits · 戴 / test

arch/arm/mach-pxa/generic.c

+1 −2

Original line number	Diff line number	Diff line
		@@ -79,8 +79,7 @@ unsigned int get_memclk_frequency_10khz(void)
		return pxa25x_get_memclk_frequency_10khz();
		else if (cpu_is_pxa27x())
		return pxa27x_get_memclk_frequency_10khz();
		else
		return pxa3xx_get_memclk_frequency_10khz();
		return 0;
		}
		EXPORT_SYMBOL(get_memclk_frequency_10khz);

+0 −2

Original line number	Diff line number	Diff line
		@@ -54,11 +54,9 @@ static inline void pxa2xx_clear_reset_status(unsigned int mask) {}

		#ifdef CONFIG_PXA3xx
		extern unsigned pxa3xx_get_clk_frequency_khz(int);
		extern unsigned pxa3xx_get_memclk_frequency_10khz(void);
		extern void pxa3xx_clear_reset_status(unsigned int);
		#else
		#define pxa3xx_get_clk_frequency_khz(x) (0)
		#define pxa3xx_get_memclk_frequency_10khz() (0)
		static inline void pxa3xx_clear_reset_status(unsigned int mask) {}
		#endif

+0 −17

Original line number	Diff line number	Diff line
		@@ -98,23 +98,6 @@ unsigned int pxa3xx_get_clk_frequency_khz(int info)
		return CLK / 1000;
		}

		/*
		* Return the current static memory controller clock frequency
		* in units of 10kHz
		*/
		unsigned int pxa3xx_get_memclk_frequency_10khz(void)
		{
		unsigned long acsr;
		unsigned int smcfs, clk = 0;

		acsr = ACSR;

		smcfs = (acsr >> 23) & 0x7;
		clk = (acsr & ACCR_D0CS) ? RO_CLK : smcfs_mult[smcfs] * BASE_CLK;

		return (clk / 10000);
		}

		void pxa3xx_clear_reset_status(unsigned int mask)
		{
		/* RESET_STATUS_* has a 1:1 mapping with ARSR */