Commit 797a6153 authored by Chris Wilson's avatar Chris Wilson
Browse files

drm/i915/gt: Call intel_gt_sanitize() directly 



Assume all responsibility for operating on the HW to sanitize the GT
state upon load/resume in intel_gt_sanitize() itself.

Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: default avatarAndi Shyti <andi.shyti@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191101141009.15581-1-chris@chris-wilson.co.uk
parent 4605bb73

drivers/gpu/drm/i915/gem/i915_gem_pm.c

+0 −5
Original line number Diff line number Diff line
@@ -74,7 +74,6 @@ void i915_gem_suspend(struct drm_i915_private *i915) 
	 * not rely on its state.

	 */

	intel_gt_suspend(&i915->gt);

	intel_uc_suspend(&i915->gt.uc);



	i915_gem_drain_freed_objects(i915);

}
@@ -140,8 +139,6 @@ void i915_gem_suspend_late(struct drm_i915_private *i915) 
		list_splice_tail(&keep, *phase);

	}

	spin_unlock_irqrestore(&i915->mm.obj_lock, flags);



	i915_gem_sanitize(i915);

}



void i915_gem_resume(struct drm_i915_private *i915)
@@ -161,8 +158,6 @@ void i915_gem_resume(struct drm_i915_private *i915) 
	if (intel_gt_resume(&i915->gt))

		goto err_wedged;



	intel_uc_resume(&i915->gt.uc);



	/* Always reload a context for powersaving. */

	if (!switch_to_kernel_context_sync(&i915->gt))

		goto err_wedged;

drivers/gpu/drm/i915/gt/intel_gt.c

+4 −2
Original line number Diff line number Diff line
@@ -32,9 +32,11 @@ void intel_gt_init_early(struct intel_gt *gt, struct drm_i915_private *i915) 
	intel_uc_init_early(&gt->uc);

}



void intel_gt_init_hw_early(struct drm_i915_private *i915)

void intel_gt_init_hw_early(struct intel_gt *gt, struct i915_ggtt *ggtt)

{

	i915->gt.ggtt = &i915->ggtt;

	gt->ggtt = ggtt;



	intel_gt_sanitize(gt, false);

}



static void init_unused_ring(struct intel_gt *gt, u32 base)

drivers/gpu/drm/i915/gt/intel_gt.h

+1 −1
Original line number Diff line number Diff line
@@ -28,7 +28,7 @@ static inline struct intel_gt *huc_to_gt(struct intel_huc *huc) 
}



void intel_gt_init_early(struct intel_gt *gt, struct drm_i915_private *i915);

void intel_gt_init_hw_early(struct drm_i915_private *i915);

void intel_gt_init_hw_early(struct intel_gt *gt, struct i915_ggtt *ggtt);

int __must_check intel_gt_init_hw(struct intel_gt *gt);

int intel_gt_init(struct intel_gt *gt);

void intel_gt_driver_register(struct intel_gt *gt);

drivers/gpu/drm/i915/gt/intel_gt_pm.c

+35 −1
Original line number Diff line number Diff line
@@ -118,8 +118,22 @@ void intel_gt_sanitize(struct intel_gt *gt, bool force) 
{

	struct intel_engine_cs *engine;

	enum intel_engine_id id;

	intel_wakeref_t wakeref;



	GEM_TRACE("\n");

	GEM_TRACE("force:%s\n", yesno(force));



	/* Use a raw wakeref to avoid calling intel_display_power_get early */

	wakeref = intel_runtime_pm_get(gt->uncore->rpm);

	intel_uncore_forcewake_get(gt->uncore, FORCEWAKE_ALL);



	/*

	 * As we have just resumed the machine and woken the device up from

	 * deep PCI sleep (presumably D3_cold), assume the HW has been reset

	 * back to defaults, recovering from whatever wedged state we left it

	 * in and so worth trying to use the device once more.

	 */

	if (intel_gt_is_wedged(gt))

		intel_gt_unset_wedged(gt);



	intel_uc_sanitize(&gt->uc);
@@ -127,6 +141,8 @@ void intel_gt_sanitize(struct intel_gt *gt, bool force) 
		if (engine->reset.prepare)

			engine->reset.prepare(engine);



	intel_uc_reset_prepare(&gt->uc);



	if (reset_engines(gt) || force) {

		for_each_engine(engine, gt, id)

			__intel_engine_reset(engine, false);
@@ -135,6 +151,9 @@ void intel_gt_sanitize(struct intel_gt *gt, bool force) 
	for_each_engine(engine, gt, id)

		if (engine->reset.finish)

			engine->reset.finish(engine);



	intel_uncore_forcewake_put(gt->uncore, FORCEWAKE_ALL);

	intel_runtime_pm_put(gt->uncore->rpm, wakeref);

}



void intel_gt_pm_fini(struct intel_gt *gt)
@@ -148,6 +167,8 @@ int intel_gt_resume(struct intel_gt *gt) 
	enum intel_engine_id id;

	int err = 0;



	GEM_TRACE("\n");



	/*

	 * After resume, we may need to poke into the pinned kernel

	 * contexts to paper over any damage caused by the sudden suspend.
@@ -186,6 +207,9 @@ int intel_gt_resume(struct intel_gt *gt) 
	}



	intel_rc6_enable(&gt->rc6);



	intel_uc_resume(&gt->uc);



	intel_uncore_forcewake_put(gt->uncore, FORCEWAKE_ALL);

	intel_gt_pm_put(gt);
@@ -212,20 +236,30 @@ void intel_gt_suspend(struct intel_gt *gt) 
	/* We expect to be idle already; but also want to be independent */

	wait_for_idle(gt);



	intel_uc_suspend(&gt->uc);



	with_intel_runtime_pm(gt->uncore->rpm, wakeref) {

		intel_rps_disable(&gt->rps);

		intel_rc6_disable(&gt->rc6);

		intel_llc_disable(&gt->llc);

	}



	intel_gt_sanitize(gt, false);



	GEM_TRACE("\n");

}



void intel_gt_runtime_suspend(struct intel_gt *gt)

{

	intel_uc_runtime_suspend(&gt->uc);



	GEM_TRACE("\n");

}



int intel_gt_runtime_resume(struct intel_gt *gt)

{

	GEM_TRACE("\n");



	intel_gt_init_swizzling(gt);



	return intel_uc_runtime_resume(&gt->uc);

drivers/gpu/drm/i915/i915_drv.c

+2 −6
Original line number Diff line number Diff line
@@ -603,8 +603,6 @@ static int i915_driver_mmio_probe(struct drm_i915_private *dev_priv) 
	if (ret)

		goto err_uncore;



	i915_gem_init_mmio(dev_priv);



	return 0;



err_uncore:
@@ -1177,7 +1175,7 @@ static int i915_driver_hw_probe(struct drm_i915_private *dev_priv) 
	if (ret)

		goto err_ggtt;



	intel_gt_init_hw_early(dev_priv);

	intel_gt_init_hw_early(&dev_priv->gt, &dev_priv->ggtt);



	ret = i915_ggtt_enable_hw(dev_priv);

	if (ret) {
@@ -1821,7 +1819,7 @@ static int i915_drm_resume(struct drm_device *dev) 


	disable_rpm_wakeref_asserts(&dev_priv->runtime_pm);



	i915_gem_sanitize(dev_priv);

	intel_gt_sanitize(&dev_priv->gt, true);



	ret = i915_ggtt_enable_hw(dev_priv);

	if (ret)
@@ -1952,8 +1950,6 @@ static int i915_drm_resume_early(struct drm_device *dev) 


	intel_power_domains_resume(dev_priv);



	intel_gt_sanitize(&dev_priv->gt, true);



	enable_rpm_wakeref_asserts(&dev_priv->runtime_pm);



	return ret;

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