Commit 791d3ef2 authored by Rob Herring's avatar Rob Herring
Browse files

dt-bindings: remove 'interrupt-parent' from bindings 



'interrupt-parent' is often documented as part of define bindings, but
it is really outside the scope of a device binding. It's never required
in a given node as it is often inherited from a parent node. Or it can
be implicit if a parent node is an 'interrupt-controller' node. So
remove it from all the binding files.

Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Signed-off-by: default avatarRob Herring <robh@kernel.org>
parent 13d6753f

Documentation/devicetree/bindings/arm/freescale/fsl,vf610-mscm-ir.txt

+0 −3
Original line number Original line Diff line number Diff line
@@ -18,9 +18,6 @@ Required properties: 
			assignment of the interrupt router is required.

			assignment of the interrupt router is required.

			Flags get passed only when using GIC as parent. Flags

			Flags get passed only when using GIC as parent. Flags

			encoding as documented by the GIC bindings.

			encoding as documented by the GIC bindings.

- interrupt-parent:	Should be the phandle for the interrupt controller of

			the CPU the device tree is intended to be used on. This

			is either the node of the GIC or NVIC controller.





Example:

Example:

	mscm_ir: interrupt-controller@40001800 {

	mscm_ir: interrupt-controller@40001800 {

Documentation/devicetree/bindings/arm/omap/crossbar.txt

+0 −1
Original line number Original line Diff line number Diff line
@@ -10,7 +10,6 @@ Required properties: 
- compatible : Should be "ti,irq-crossbar"

- compatible : Should be "ti,irq-crossbar"

- reg: Base address and the size of the crossbar registers.

- reg: Base address and the size of the crossbar registers.

- interrupt-controller: indicates that this block is an interrupt controller.

- interrupt-controller: indicates that this block is an interrupt controller.

- interrupt-parent: the interrupt controller this block is connected to.

- ti,max-irqs: Total number of irqs available at the parent interrupt controller.

- ti,max-irqs: Total number of irqs available at the parent interrupt controller.

- ti,max-crossbar-sources: Maximum number of crossbar sources that can be routed.

- ti,max-crossbar-sources: Maximum number of crossbar sources that can be routed.

- ti,reg-size: Size of a individual register in bytes. Every individual

- ti,reg-size: Size of a individual register in bytes. Every individual

Documentation/devicetree/bindings/arm/samsung/pmu.txt

+0 −3
Original line number Original line Diff line number Diff line
@@ -40,9 +40,6 @@ following properties: 
- #interrupt-cells: must be identical to the that of the parent interrupt

- #interrupt-cells: must be identical to the that of the parent interrupt

  controller.

  controller.





- interrupt-parent: a phandle indicating which interrupt controller

  this PMU signals interrupts to.







Optional nodes:

Optional nodes:

Documentation/devicetree/bindings/ata/fsl-sata.txt

+0 −1
Original line number Original line Diff line number Diff line
@@ -16,7 +16,6 @@ Required properties: 
                          4 for controller @ 0x1b000

                          4 for controller @ 0x1b000





Optional properties:

Optional properties:

- interrupt-parent  : optional, if needed for interrupt mapping

- reg               : <registers mapping>

- reg               : <registers mapping>





Example:

Example:

Documentation/devicetree/bindings/ata/pata-arasan.txt

+0 −2
Original line number Original line Diff line number Diff line
@@ -3,8 +3,6 @@ 
Required properties:

Required properties:

- compatible: "arasan,cf-spear1340"

- compatible: "arasan,cf-spear1340"

- reg: Address range of the CF registers

- reg: Address range of the CF registers

- interrupt-parent: Should be the phandle for the interrupt controller

  that services interrupts for this device

- interrupt: Should contain the CF interrupt number

- interrupt: Should contain the CF interrupt number

- clock-frequency: Interface clock rate, in Hz, one of

- clock-frequency: Interface clock rate, in Hz, one of

       25000000

       25000000

CRA Git | Maintained and supported by SUSTech CRA and CCSE