Commit 7907b52d authored by Ping-Ke Shih's avatar Ping-Ke Shih Committed by Kalle Valo
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rtw88: 8723d: 11N chips don't support H2C queue



H2C queue is used to send command to firmware. Since 8723D doesn't support
this queue, this commit check wlan_cpu flag to avoid to set H2C related
registers.

Signed-off-by: default avatarPing-Ke Shih <pkshih@realtek.com>
Signed-off-by: default avatarYan-Hsuan Chuang <yhchuang@realtek.com>
Signed-off-by: default avatarKalle Valo <kvalo@codeaurora.org>
Link: https://lore.kernel.org/r/20200422034607.28747-6-yhchuang@realtek.com
parent fd9ead38
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+5 −1
Original line number Diff line number Diff line
@@ -1016,6 +1016,7 @@ static int txdma_queue_mapping(struct rtw_dev *rtwdev)

	rtw_write8(rtwdev, REG_CR, 0);
	rtw_write8(rtwdev, REG_CR, MAC_TRX_ENABLE);
	if (rtw_chip_wcpu_11ac(rtwdev))
		rtw_write32(rtwdev, REG_H2CQ_CSR, BIT_H2CQ_FULL);

	return 0;
@@ -1135,6 +1136,9 @@ static int init_h2c(struct rtw_dev *rtwdev)
	u32 h2cq_free;
	u32 wp, rp;

	if (rtw_chip_wcpu_11n(rtwdev))
		return 0;

	h2cq_addr = fifo->rsvd_h2cq_addr << TX_PAGE_SIZE_SHIFT;
	h2cq_size = RSVD_PG_H2CQ_NUM << TX_PAGE_SIZE_SHIFT;

+23 −12
Original line number Diff line number Diff line
@@ -411,12 +411,14 @@ static void rtw_pci_reset_buf_desc(struct rtw_dev *rtwdev)
	dma = rtwpci->tx_rings[RTW_TX_QUEUE_BCN].r.dma;
	rtw_write32(rtwdev, RTK_PCI_TXBD_DESA_BCNQ, dma);

	if (!rtw_chip_wcpu_11n(rtwdev)) {
		len = rtwpci->tx_rings[RTW_TX_QUEUE_H2C].r.len;
		dma = rtwpci->tx_rings[RTW_TX_QUEUE_H2C].r.dma;
		rtwpci->tx_rings[RTW_TX_QUEUE_H2C].r.rp = 0;
		rtwpci->tx_rings[RTW_TX_QUEUE_H2C].r.wp = 0;
		rtw_write16(rtwdev, RTK_PCI_TXBD_NUM_H2CQ, len & TRX_BD_IDX_MASK);
		rtw_write32(rtwdev, RTK_PCI_TXBD_DESA_H2CQ, dma);
	}

	len = rtwpci->tx_rings[RTW_TX_QUEUE_BK].r.len;
	dma = rtwpci->tx_rings[RTW_TX_QUEUE_BK].r.dma;
@@ -471,6 +473,7 @@ static void rtw_pci_reset_buf_desc(struct rtw_dev *rtwdev)
	rtw_write32(rtwdev, RTK_PCI_TXBD_RWPTR_CLR, 0xffffffff);

	/* reset H2C Queue index in a single write */
	if (rtw_chip_wcpu_11ac(rtwdev))
		rtw_write32_set(rtwdev, RTK_PCI_TXBD_H2CQ_CSR,
				BIT_CLR_H2CQ_HOST_IDX | BIT_CLR_H2CQ_HW_IDX);
}
@@ -489,7 +492,9 @@ static void rtw_pci_enable_interrupt(struct rtw_dev *rtwdev,

	rtw_write32(rtwdev, RTK_PCI_HIMR0, rtwpci->irq_mask[0]);
	rtw_write32(rtwdev, RTK_PCI_HIMR1, rtwpci->irq_mask[1]);
	if (rtw_chip_wcpu_11ac(rtwdev))
		rtw_write32(rtwdev, RTK_PCI_HIMR3, rtwpci->irq_mask[3]);

	rtwpci->irq_enabled = true;

	spin_unlock_irqrestore(&rtwpci->hwirq_lock, flags);
@@ -507,7 +512,9 @@ static void rtw_pci_disable_interrupt(struct rtw_dev *rtwdev,

	rtw_write32(rtwdev, RTK_PCI_HIMR0, 0);
	rtw_write32(rtwdev, RTK_PCI_HIMR1, 0);
	if (rtw_chip_wcpu_11ac(rtwdev))
		rtw_write32(rtwdev, RTK_PCI_HIMR3, 0);

	rtwpci->irq_enabled = false;

out:
@@ -1012,12 +1019,16 @@ static void rtw_pci_irq_recognized(struct rtw_dev *rtwdev,

	irq_status[0] = rtw_read32(rtwdev, RTK_PCI_HISR0);
	irq_status[1] = rtw_read32(rtwdev, RTK_PCI_HISR1);
	if (rtw_chip_wcpu_11ac(rtwdev))
		irq_status[3] = rtw_read32(rtwdev, RTK_PCI_HISR3);
	else
		irq_status[3] = 0;
	irq_status[0] &= rtwpci->irq_mask[0];
	irq_status[1] &= rtwpci->irq_mask[1];
	irq_status[3] &= rtwpci->irq_mask[3];
	rtw_write32(rtwdev, RTK_PCI_HISR0, irq_status[0]);
	rtw_write32(rtwdev, RTK_PCI_HISR1, irq_status[1]);
	if (rtw_chip_wcpu_11ac(rtwdev))
		rtw_write32(rtwdev, RTK_PCI_HISR3, irq_status[3]);

	spin_unlock_irqrestore(&rtwpci->hwirq_lock, flags);