drm/amd/pm: add deep sleep control for uclk and fclk (78d907e2) · Commits · 戴 / test

These are supported by Sienna Cichlid and should be taken into consideration during DS control. Signed-off-by:

drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c

+16 −0

Original line number	Diff line number	Diff line
		@@ -2087,6 +2087,22 @@ int smu_v11_0_deep_sleep_control(struct smu_context *smu,
		}
		}

		if (smu_cmn_feature_is_supported(smu, SMU_FEATURE_DS_UCLK_BIT)) {
		ret = smu_cmn_feature_set_enabled(smu, SMU_FEATURE_DS_UCLK_BIT, enablement);
		if (ret) {
		dev_err(adev->dev, "Failed to %s UCLK DS!\n", enablement ? "enable" : "disable");
		return ret;
		}
		}

		if (smu_cmn_feature_is_supported(smu, SMU_FEATURE_DS_FCLK_BIT)) {
		ret = smu_cmn_feature_set_enabled(smu, SMU_FEATURE_DS_FCLK_BIT, enablement);
		if (ret) {
		dev_err(adev->dev, "Failed to %s FCLK DS!\n", enablement ? "enable" : "disable");
		return ret;
		}
		}

		if (smu_cmn_feature_is_supported(smu, SMU_FEATURE_DS_SOCCLK_BIT)) {
		ret = smu_cmn_feature_set_enabled(smu, SMU_FEATURE_DS_SOCCLK_BIT, enablement);
		if (ret) {