Commit 789e6ac0 authored by Zachary Amsden's avatar Zachary Amsden Committed by Linus Torvalds
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[PATCH] paravirt: update pte hook 



Add a pte_update_hook which notifies about pte changes that have been made
without using the set_pte / clear_pte interfaces.  This allows shadow mode
hypervisors which do not trap on page table access to maintain synchronized
shadows.

It also turns out, there was one pte update in PAE mode that wasn't using any
accessor interface at all for setting NX protection.  Considering it is PAE
specific, and the accessor is i386 specific, I didn't want to add a generic
encapsulation of this behavior yet.

Signed-off-by: default avatarZachary Amsden <zach@vmware.com>
Cc: Rusty Russell <rusty@rustcorp.com.au>
Cc: Jeremy Fitzhardinge <jeremy@xensource.com>
Cc: Andi Kleen <ak@suse.de>
Signed-off-by: default avatarAndrew Morton <akpm@osdl.org>
Signed-off-by: default avatarLinus Torvalds <torvalds@osdl.org>
parent a93cb055

arch/i386/mm/init.c

+1 −0
Original line number Diff line number Diff line
@@ -493,6 +493,7 @@ int __init set_kernel_exec(unsigned long vaddr, int enable) 
		pte->pte_high &= ~(1 << (_PAGE_BIT_NX - 32));

	else

		pte->pte_high |= 1 << (_PAGE_BIT_NX - 32);

	pte_update_defer(&init_mm, vaddr, pte);

	__flush_tlb_all();

out:

	return ret;

include/asm-i386/pgtable.h

+21 −0
Original line number Diff line number Diff line
@@ -246,6 +246,23 @@ static inline pte_t pte_mkhuge(pte_t pte) { (pte).pte_low |= _PAGE_PSE; return p 
# include <asm/pgtable-2level.h>

#endif



/*

 * Rules for using pte_update - it must be called after any PTE update which

 * has not been done using the set_pte / clear_pte interfaces.  It is used by

 * shadow mode hypervisors to resynchronize the shadow page tables.  Kernel PTE

 * updates should either be sets, clears, or set_pte_atomic for P->P

 * transitions, which means this hook should only be called for user PTEs.

 * This hook implies a P->P protection or access change has taken place, which

 * requires a subsequent TLB flush.  The notification can optionally be delayed

 * until the TLB flush event by using the pte_update_defer form of the

 * interface, but care must be taken to assure that the flush happens while

 * still holding the same page table lock so that the shadow and primary pages

 * do not become out of sync on SMP.

 */

#define pte_update(mm, addr, ptep)		do { } while (0)

#define pte_update_defer(mm, addr, ptep)	do { } while (0)





/*

 * We only update the dirty/accessed state if we set

 * the dirty bit by hand in the kernel, since the hardware
@@ -258,6 +275,7 @@ static inline pte_t pte_mkhuge(pte_t pte) { (pte).pte_low |= _PAGE_PSE; return p 
do {									\

	if (dirty) {							\

		(ptep)->pte_low = (entry).pte_low;			\

		pte_update_defer((vma)->vm_mm, (addr), (ptep));		\

		flush_tlb_page(vma, address);				\

	}								\

} while (0)
@@ -287,6 +305,7 @@ do { \ 
	__dirty = pte_dirty(*(ptep));					\

	if (__dirty) {							\

		clear_bit(_PAGE_BIT_DIRTY, &(ptep)->pte_low);		\

		pte_update_defer((vma)->vm_mm, (addr), (ptep));		\

		flush_tlb_page(vma, address);				\

	}								\

	__dirty;							\
@@ -299,6 +318,7 @@ do { \ 
	__young = pte_young(*(ptep));					\

	if (__young) {							\

		clear_bit(_PAGE_BIT_ACCESSED, &(ptep)->pte_low);	\

		pte_update_defer((vma)->vm_mm, (addr), (ptep));		\

		flush_tlb_page(vma, address);				\

	}								\

	__young;							\
@@ -321,6 +341,7 @@ static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm, unsigned long 
static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr, pte_t *ptep)

{

	clear_bit(_PAGE_BIT_RW, &ptep->pte_low);

	pte_update(mm, addr, ptep);

}



/*

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