arm64: dts: fsl: ls1028a: Add qDMA node

			};

		};

		qdma: dma-controller@8380000 {

			compatible = "fsl,ls1028a-qdma", "fsl,ls1021a-qdma";

			reg = <0x0 0x8380000 0x0 0x1000>, /* Controller regs */

			      <0x0 0x8390000 0x0 0x10000>, /* Status regs */

			      <0x0 0x83a0000 0x0 0x40000>; /* Block regs */

			interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>;

			interrupt-names = "qdma-error", "qdma-queue0",

				"qdma-queue1", "qdma-queue2", "qdma-queue3";

			dma-channels = <8>;

			block-number = <1>;

			block-offset = <0x10000>;

			fsl,dma-queues = <2>;

			status-sizes = <64>;

			queue-sizes = <64 64>;

		};

		cluster1_core0_watchdog: watchdog@c000000 {

			compatible = "arm,sp805", "arm,primecell";

			reg = <0x0 0xc000000 0x0 0x1000>;