Commit 77dfb36a authored by Christian Gmeiner's avatar Christian Gmeiner Committed by Lucas Stach
Browse files

drm/etnaviv: rename pipe_reg_read(..) 



pipe_reg_read(..) iterates over all pixel pipes, selects a perf counter
register and sums the actual perf counter value. Rename the function
to reflect more what it is actual doing.

Signed-off-by: default avatarChristian Gmeiner <christian.gmeiner@gmail.com>
Signed-off-by: default avatarLucas Stach <l.stach@pengutronix.de>
parent 9123e3a7

drivers/gpu/drm/etnaviv/etnaviv_perfmon.c

+15 −15
Original line number Diff line number Diff line
@@ -46,7 +46,7 @@ static u32 perf_reg_read(struct etnaviv_gpu *gpu, 
	return gpu_read(gpu, domain->profile_read);

}



static u32 pipe_reg_read(struct etnaviv_gpu *gpu,

static u32 pipe_perf_reg_read(struct etnaviv_gpu *gpu,

	const struct etnaviv_pm_domain *domain,

	const struct etnaviv_pm_signal *signal)

{
@@ -141,22 +141,22 @@ static const struct etnaviv_pm_domain doms_3d[] = { 
			{

				"PIXEL_COUNT_KILLED_BY_COLOR_PIPE",

				VIVS_MC_PROFILE_CONFIG0_PE_PIXEL_COUNT_KILLED_BY_COLOR_PIPE,

				&pipe_reg_read

				&pipe_perf_reg_read

			},

			{

				"PIXEL_COUNT_KILLED_BY_DEPTH_PIPE",

				VIVS_MC_PROFILE_CONFIG0_PE_PIXEL_COUNT_KILLED_BY_DEPTH_PIPE,

				&pipe_reg_read

				&pipe_perf_reg_read

			},

			{

				"PIXEL_COUNT_DRAWN_BY_COLOR_PIPE",

				VIVS_MC_PROFILE_CONFIG0_PE_PIXEL_COUNT_DRAWN_BY_COLOR_PIPE,

				&pipe_reg_read

				&pipe_perf_reg_read

			},

			{

				"PIXEL_COUNT_DRAWN_BY_DEPTH_PIPE",

				VIVS_MC_PROFILE_CONFIG0_PE_PIXEL_COUNT_DRAWN_BY_DEPTH_PIPE,

				&pipe_reg_read

				&pipe_perf_reg_read

			}

		}

	},
@@ -184,32 +184,32 @@ static const struct etnaviv_pm_domain doms_3d[] = { 
			{

				"VS_INST_COUNTER",

				VIVS_MC_PROFILE_CONFIG0_SH_VS_INST_COUNTER,

				&pipe_reg_read

				&pipe_perf_reg_read

			},

			{

				"RENDERED_VERTICE_COUNTER",

				VIVS_MC_PROFILE_CONFIG0_SH_RENDERED_VERTICE_COUNTER,

				&pipe_reg_read

				&pipe_perf_reg_read

			},

			{

				"VTX_BRANCH_INST_COUNTER",

				VIVS_MC_PROFILE_CONFIG0_SH_VTX_BRANCH_INST_COUNTER,

				&pipe_reg_read

				&pipe_perf_reg_read

			},

			{

				"VTX_TEXLD_INST_COUNTER",

				VIVS_MC_PROFILE_CONFIG0_SH_VTX_TEXLD_INST_COUNTER,

				&pipe_reg_read

				&pipe_perf_reg_read

			},

			{

				"PXL_BRANCH_INST_COUNTER",

				VIVS_MC_PROFILE_CONFIG0_SH_PXL_BRANCH_INST_COUNTER,

				&pipe_reg_read

				&pipe_perf_reg_read

			},

			{

				"PXL_TEXLD_INST_COUNTER",

				VIVS_MC_PROFILE_CONFIG0_SH_PXL_TEXLD_INST_COUNTER,

				&pipe_reg_read

				&pipe_perf_reg_read

			}

		}

	},
@@ -237,17 +237,17 @@ static const struct etnaviv_pm_domain doms_3d[] = { 
			{

				"DEPTH_CLIPPED_COUNTER",

				VIVS_MC_PROFILE_CONFIG1_PA_DEPTH_CLIPPED_COUNTER,

				&pipe_reg_read

				&pipe_perf_reg_read

			},

			{

				"TRIVIAL_REJECTED_COUNTER",

				VIVS_MC_PROFILE_CONFIG1_PA_TRIVIAL_REJECTED_COUNTER,

				&pipe_reg_read

				&pipe_perf_reg_read

			},

			{

				"CULLED_COUNTER",

				VIVS_MC_PROFILE_CONFIG1_PA_CULLED_COUNTER,

				&pipe_reg_read

				&pipe_perf_reg_read

			}

		}

	},
@@ -400,7 +400,7 @@ static const struct etnaviv_pm_domain doms_2d[] = { 
			{

				"PIXELS_RENDERED_2D",

				VIVS_MC_PROFILE_CONFIG0_PE_PIXELS_RENDERED_2D,

				&pipe_reg_read

				&pipe_perf_reg_read

			}

		}

	}

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