drm/i915/tgl: whitelist PS_(DEPTH|INVOCATION)_COUNT (772d1dea) · Commits · 戴 / test

As with commit , this change fixes multiple tests that are using the invocation counts. Documentation doesn't list the workaround for TGL but applying it fixes the tests. Signed-off-by:

Tapani Pälli <tapani.palli@intel.com> Acked-by:

Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by:

Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by:

Mika Kuoppala <mika.kuoppala@linux.intel.com> Signed-off-by:

Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20191024103858.28113-2-mika.kuoppala@linux.intel.com

drivers/gpu/drm/i915/gt/intel_workarounds.c

+20 −0

Original line number	Diff line number	Diff line
		@@ -1216,6 +1216,26 @@ static void icl_whitelist_build(struct intel_engine_cs *engine)

		static void tgl_whitelist_build(struct intel_engine_cs *engine)
		{
		struct i915_wa_list *w = &engine->whitelist;

		switch (engine->class) {
		case RENDER_CLASS:
		/*
		* WaAllowPMDepthAndInvocationCountAccessFromUMD:tgl
		*
		* This covers 4 registers which are next to one another :
		* - PS_INVOCATION_COUNT
		* - PS_INVOCATION_COUNT_UDW
		* - PS_DEPTH_COUNT
		* - PS_DEPTH_COUNT_UDW
		*/
		whitelist_reg_ext(w, PS_INVOCATION_COUNT,
		RING_FORCE_TO_NONPRIV_ACCESS_RD \|
		RING_FORCE_TO_NONPRIV_RANGE_4);
		break;
		default:
		break;
		}
		}

		void intel_engine_init_whitelist(struct intel_engine_cs *engine)

Admin message