Commit 77223211 authored by Fabrizio Castro's avatar Fabrizio Castro Committed by Simon Horman
Browse files

arm64: dts: renesas: r8a774c0: Add SDHI nodes 



Add SDHI nodes to the DT of the r8a774c0 SoC.

Signed-off-by: default avatarFabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
parent 9b55a05e

arch/arm64/boot/dts/renesas/r8a774c0.dtsi

+36 −0
Original line number Diff line number Diff line
@@ -603,6 +603,42 @@ 
			status = "disabled";

		};



		sdhi0: sd@ee100000 {

			compatible = "renesas,sdhi-r8a774c0",

				     "renesas,rcar-gen3-sdhi";

			reg = <0 0xee100000 0 0x2000>;

			interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 314>;

			max-frequency = <200000000>;

			power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;

			resets = <&cpg 314>;

			status = "disabled";

		};



		sdhi1: sd@ee120000 {

			compatible = "renesas,sdhi-r8a774c0",

				     "renesas,rcar-gen3-sdhi";

			reg = <0 0xee120000 0 0x2000>;

			interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 313>;

			max-frequency = <200000000>;

			power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;

			resets = <&cpg 313>;

			status = "disabled";

		};



		sdhi3: sd@ee160000 {

			compatible = "renesas,sdhi-r8a774c0",

				     "renesas,rcar-gen3-sdhi";

			reg = <0 0xee160000 0 0x2000>;

			interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 311>;

			max-frequency = <200000000>;

			power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;

			resets = <&cpg 311>;

			status = "disabled";

		};



		gic: interrupt-controller@f1010000 {

			compatible = "arm,gic-400";

			#interrupt-cells = <3>;

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