Commit 770d13b1 authored by Christian König's avatar Christian König Committed by Alex Deucher
Browse files

drm/amdgpu: move struct amdgpu_mc into amdgpu_gmc.h 



And rename it to amdgpu_gmc as well.

Signed-off-by: default avatarChristian König <christian.koenig@amd.com>
Reviewed-by: default avatarSamuel Li <Samuel.Li@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent da320625

drivers/gpu/drm/amd/amdgpu/amdgpu.h

+4 −52
Original line number Diff line number Diff line
@@ -68,6 +68,7 @@ 
#include "amdgpu_vce.h"

#include "amdgpu_vcn.h"

#include "amdgpu_mn.h"

#include "amdgpu_gmc.h"

#include "amdgpu_dm.h"

#include "amdgpu_virt.h"

#include "amdgpu_gart.h"
@@ -495,55 +496,6 @@ int amdgpu_mode_dumb_mmap(struct drm_file *filp, 
int amdgpu_fence_slab_init(void);

void amdgpu_fence_slab_fini(void);



/*

 * VMHUB structures, functions & helpers

 */

struct amdgpu_vmhub {

	uint32_t	ctx0_ptb_addr_lo32;

	uint32_t	ctx0_ptb_addr_hi32;

	uint32_t	vm_inv_eng0_req;

	uint32_t	vm_inv_eng0_ack;

	uint32_t	vm_context0_cntl;

	uint32_t	vm_l2_pro_fault_status;

	uint32_t	vm_l2_pro_fault_cntl;

};



/*

 * GPU MC structures, functions & helpers

 */

struct amdgpu_mc {

	resource_size_t		aper_size;

	resource_size_t		aper_base;

	/* for some chips with <= 32MB we need to lie

	 * about vram size near mc fb location */

	u64			mc_vram_size;

	u64			visible_vram_size;

	u64			gart_size;

	u64			gart_start;

	u64			gart_end;

	u64			vram_start;

	u64			vram_end;

	unsigned		vram_width;

	u64			real_vram_size;

	int			vram_mtrr;

	u64                     mc_mask;

	const struct firmware   *fw;	/* MC firmware */

	uint32_t                fw_version;

	struct amdgpu_irq_src	vm_fault;

	uint32_t		vram_type;

	uint32_t                srbm_soft_reset;

	bool			prt_warning;

	uint64_t		stolen_size;

	/* apertures */

	u64					shared_aperture_start;

	u64					shared_aperture_end;

	u64					private_aperture_start;

	u64					private_aperture_end;

	/* protects concurrent invalidation */

	spinlock_t		invalidate_lock;

	bool			translate_further;

};



/*

 * GPU doorbell structures, functions & helpers

 */
@@ -1579,7 +1531,7 @@ struct amdgpu_device { 
	struct amdgpu_clock            clock;



	/* MC */

	struct amdgpu_mc		mc;

	struct amdgpu_gmc		gmc;

	struct amdgpu_gart		gart;

	struct amdgpu_dummy_page	dummy_page;

	struct amdgpu_vm_manager	vm_manager;
@@ -1908,9 +1860,9 @@ void amdgpu_cs_report_moved_bytes(struct amdgpu_device *adev, u64 num_bytes, 
void amdgpu_ttm_placement_from_domain(struct amdgpu_bo *abo, u32 domain);

bool amdgpu_ttm_bo_is_amdgpu_bo(struct ttm_buffer_object *bo);

void amdgpu_device_vram_location(struct amdgpu_device *adev,

				 struct amdgpu_mc *mc, u64 base);

				 struct amdgpu_gmc *mc, u64 base);

void amdgpu_device_gart_location(struct amdgpu_device *adev,

				 struct amdgpu_mc *mc);

				 struct amdgpu_gmc *mc);

int amdgpu_device_resize_fb_bar(struct amdgpu_device *adev);

void amdgpu_ttm_set_active_vram_size(struct amdgpu_device *adev, u64 size);

int amdgpu_ttm_init(struct amdgpu_device *adev);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c

+8 −8
Original line number Diff line number Diff line
@@ -281,21 +281,21 @@ void get_local_mem_info(struct kgd_dev *kgd, 
	struct amdgpu_device *adev = (struct amdgpu_device *)kgd;

	uint64_t address_mask = adev->dev->dma_mask ? ~*adev->dev->dma_mask :

					     ~((1ULL << 32) - 1);

	resource_size_t aper_limit = adev->mc.aper_base + adev->mc.aper_size;

	resource_size_t aper_limit = adev->gmc.aper_base + adev->gmc.aper_size;



	memset(mem_info, 0, sizeof(*mem_info));

	if (!(adev->mc.aper_base & address_mask || aper_limit & address_mask)) {

		mem_info->local_mem_size_public = adev->mc.visible_vram_size;

		mem_info->local_mem_size_private = adev->mc.real_vram_size -

				adev->mc.visible_vram_size;

	if (!(adev->gmc.aper_base & address_mask || aper_limit & address_mask)) {

		mem_info->local_mem_size_public = adev->gmc.visible_vram_size;

		mem_info->local_mem_size_private = adev->gmc.real_vram_size -

				adev->gmc.visible_vram_size;

	} else {

		mem_info->local_mem_size_public = 0;

		mem_info->local_mem_size_private = adev->mc.real_vram_size;

		mem_info->local_mem_size_private = adev->gmc.real_vram_size;

	}

	mem_info->vram_width = adev->mc.vram_width;

	mem_info->vram_width = adev->gmc.vram_width;



	pr_debug("Address base: %pap limit %pap public 0x%llx private 0x%llx\n",

			&adev->mc.aper_base, &aper_limit,

			&adev->gmc.aper_base, &aper_limit,

			mem_info->local_mem_size_public,

			mem_info->local_mem_size_private);

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

+8 −8
Original line number Diff line number Diff line
@@ -257,7 +257,7 @@ static void amdgpu_cs_get_threshold_for_moves(struct amdgpu_device *adev, 
		return;

	}



	total_vram = adev->mc.real_vram_size - adev->vram_pin_size;

	total_vram = adev->gmc.real_vram_size - adev->vram_pin_size;

	used_vram = amdgpu_vram_mgr_usage(&adev->mman.bdev.man[TTM_PL_VRAM]);

	free_vram = used_vram >= total_vram ? 0 : total_vram - used_vram;
@@ -302,8 +302,8 @@ static void amdgpu_cs_get_threshold_for_moves(struct amdgpu_device *adev, 
	*max_bytes = us_to_bytes(adev, adev->mm_stats.accum_us);



	/* Do the same for visible VRAM if half of it is free */

	if (adev->mc.visible_vram_size < adev->mc.real_vram_size) {

		u64 total_vis_vram = adev->mc.visible_vram_size;

	if (adev->gmc.visible_vram_size < adev->gmc.real_vram_size) {

		u64 total_vis_vram = adev->gmc.visible_vram_size;

		u64 used_vis_vram =

			amdgpu_vram_mgr_vis_usage(&adev->mman.bdev.man[TTM_PL_VRAM]);
@@ -359,7 +359,7 @@ static int amdgpu_cs_bo_validate(struct amdgpu_cs_parser *p, 
	 * to move it. Don't move anything if the threshold is zero.

	 */

	if (p->bytes_moved < p->bytes_moved_threshold) {

		if (adev->mc.visible_vram_size < adev->mc.real_vram_size &&

		if (adev->gmc.visible_vram_size < adev->gmc.real_vram_size &&

		    (bo->flags & AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED)) {

			/* And don't move a CPU_ACCESS_REQUIRED BO to limited

			 * visible VRAM if we've depleted our allowance to do
@@ -381,9 +381,9 @@ retry: 
	r = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);



	p->bytes_moved += ctx.bytes_moved;

	if (adev->mc.visible_vram_size < adev->mc.real_vram_size &&

	if (adev->gmc.visible_vram_size < adev->gmc.real_vram_size &&

	    bo->tbo.mem.mem_type == TTM_PL_VRAM &&

	    bo->tbo.mem.start < adev->mc.visible_vram_size >> PAGE_SHIFT)

	    bo->tbo.mem.start < adev->gmc.visible_vram_size >> PAGE_SHIFT)

		p->bytes_moved_vis += ctx.bytes_moved;



	if (unlikely(r == -ENOMEM) && domain != bo->allowed_domains) {
@@ -437,9 +437,9 @@ static bool amdgpu_cs_try_evict(struct amdgpu_cs_parser *p, 
		/* Good we can try to move this BO somewhere else */

		amdgpu_ttm_placement_from_domain(bo, other);

		update_bytes_moved_vis =

			adev->mc.visible_vram_size < adev->mc.real_vram_size &&

			adev->gmc.visible_vram_size < adev->gmc.real_vram_size &&

			bo->tbo.mem.mem_type == TTM_PL_VRAM &&

			bo->tbo.mem.start < adev->mc.visible_vram_size >> PAGE_SHIFT;

			bo->tbo.mem.start < adev->gmc.visible_vram_size >> PAGE_SHIFT;

		initial_bytes_moved = atomic64_read(&adev->num_bytes_moved);

		r = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);

		bytes_moved = atomic64_read(&adev->num_bytes_moved) -

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

+5 −5
Original line number Diff line number Diff line
@@ -544,7 +544,7 @@ void amdgpu_device_wb_free(struct amdgpu_device *adev, u32 wb) 
 * as parameter.

 */

void amdgpu_device_vram_location(struct amdgpu_device *adev,

				 struct amdgpu_mc *mc, u64 base)

				 struct amdgpu_gmc *mc, u64 base)

{

	uint64_t limit = (uint64_t)amdgpu_vram_limit << 20;
@@ -570,11 +570,11 @@ void amdgpu_device_vram_location(struct amdgpu_device *adev, 
 * FIXME: when reducing GTT size align new size on power of 2.

 */

void amdgpu_device_gart_location(struct amdgpu_device *adev,

				 struct amdgpu_mc *mc)

				 struct amdgpu_gmc *mc)

{

	u64 size_af, size_bf;



	size_af = adev->mc.mc_mask - mc->vram_end;

	size_af = adev->gmc.mc_mask - mc->vram_end;

	size_bf = mc->vram_start;

	if (size_bf > size_af) {

		if (mc->gart_size > size_bf) {
@@ -608,7 +608,7 @@ void amdgpu_device_gart_location(struct amdgpu_device *adev, 
 */

int amdgpu_device_resize_fb_bar(struct amdgpu_device *adev)

{

	u64 space_needed = roundup_pow_of_two(adev->mc.real_vram_size);

	u64 space_needed = roundup_pow_of_two(adev->gmc.real_vram_size);

	u32 rbar_size = order_base_2(((space_needed >> 20) | 1)) - 1;

	struct pci_bus *root;

	struct resource *res;
@@ -1768,7 +1768,7 @@ int amdgpu_device_init(struct amdgpu_device *adev, 
	adev->flags = flags;

	adev->asic_type = flags & AMD_ASIC_MASK;

	adev->usec_timeout = AMDGPU_MAX_USEC_TIMEOUT;

	adev->mc.gart_size = 512 * 1024 * 1024;

	adev->gmc.gart_size = 512 * 1024 * 1024;

	adev->accel_working = false;

	adev->num_rings = 0;

	adev->mman.buffer_funcs = NULL;

drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c

+5 −5
Original line number Diff line number Diff line
@@ -244,8 +244,8 @@ static int amdgpufb_create(struct drm_fb_helper *helper, 


	info->fbops = &amdgpufb_ops;



	tmp = amdgpu_bo_gpu_offset(abo) - adev->mc.vram_start;

	info->fix.smem_start = adev->mc.aper_base + tmp;

	tmp = amdgpu_bo_gpu_offset(abo) - adev->gmc.vram_start;

	info->fix.smem_start = adev->gmc.aper_base + tmp;

	info->fix.smem_len = amdgpu_bo_size(abo);

	info->screen_base = amdgpu_bo_kptr(abo);

	info->screen_size = amdgpu_bo_size(abo);
@@ -254,7 +254,7 @@ static int amdgpufb_create(struct drm_fb_helper *helper, 


	/* setup aperture base/size for vesafb takeover */

	info->apertures->ranges[0].base = adev->ddev->mode_config.fb_base;

	info->apertures->ranges[0].size = adev->mc.aper_size;

	info->apertures->ranges[0].size = adev->gmc.aper_size;



	/* Use default scratch pixmap (info->pixmap.flags = FB_PIXMAP_SYSTEM) */
@@ -264,7 +264,7 @@ static int amdgpufb_create(struct drm_fb_helper *helper, 
	}



	DRM_INFO("fb mappable at 0x%lX\n",  info->fix.smem_start);

	DRM_INFO("vram apper at 0x%lX\n",  (unsigned long)adev->mc.aper_base);

	DRM_INFO("vram apper at 0x%lX\n",  (unsigned long)adev->gmc.aper_base);

	DRM_INFO("size %lu\n", (unsigned long)amdgpu_bo_size(abo));

	DRM_INFO("fb depth is %d\n", fb->format->depth);

	DRM_INFO("   pitch is %d\n", fb->pitches[0]);
@@ -321,7 +321,7 @@ int amdgpu_fbdev_init(struct amdgpu_device *adev) 
		return 0;



	/* select 8 bpp console on low vram cards */

	if (adev->mc.real_vram_size <= (32*1024*1024))

	if (adev->gmc.real_vram_size <= (32*1024*1024))

		bpp_sel = 8;



	rfbdev = kzalloc(sizeof(struct amdgpu_fbdev), GFP_KERNEL);

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