ARM: davinci: da850: switch to using the clocksource driver (76c7473f) · Commits · 戴 / test

arch/arm/mach-davinci/da850.c

+13 −33

Original line number	Diff line number	Diff line
		@@ -35,7 +35,8 @@
		#include <mach/cputype.h>
		#include <mach/da8xx.h>
		#include <mach/pm.h>
		#include <mach/time.h>

		#include <clocksource/timer-davinci.h>

		#include "irqs.h"
		#include "mux.h"
		@@ -333,38 +334,16 @@ static struct davinci_id da850_ids[] = {
		},
		};

		static struct davinci_timer_instance da850_timer_instance[4] = {
		{
		.base = DA8XX_TIMER64P0_BASE,
		.bottom_irq = DAVINCI_INTC_IRQ(IRQ_DA8XX_TINT12_0),
		.top_irq = DAVINCI_INTC_IRQ(IRQ_DA8XX_TINT34_0),
		},
		{
		.base = DA8XX_TIMER64P1_BASE,
		.bottom_irq = DAVINCI_INTC_IRQ(IRQ_DA8XX_TINT12_1),
		.top_irq = DAVINCI_INTC_IRQ(IRQ_DA8XX_TINT34_1),
		},
		{
		.base = DA850_TIMER64P2_BASE,
		.bottom_irq = DAVINCI_INTC_IRQ(IRQ_DA850_TINT12_2),
		.top_irq = DAVINCI_INTC_IRQ(IRQ_DA850_TINT34_2),
		},
		{
		.base = DA850_TIMER64P3_BASE,
		.bottom_irq = DAVINCI_INTC_IRQ(IRQ_DA850_TINT12_3),
		.top_irq = DAVINCI_INTC_IRQ(IRQ_DA850_TINT34_3),
		},
		};

		/*
		* T0_BOT: Timer 0, bottom : Used for clock_event
		* T0_TOP: Timer 0, top : Used for clocksource
		* T1_BOT, T1_TOP: Timer 1, bottom & top: Used for watchdog timer
		* Bottom half of timer 0 is used for clock_event, top half for
		* clocksource.
		*/
		static struct davinci_timer_info da850_timer_info = {
		.timers = da850_timer_instance,
		.clockevent_id = T0_BOT,
		.clocksource_id = T0_TOP,
		static const struct davinci_timer_cfg da850_timer_cfg = {
		.reg = DEFINE_RES_IO(DA8XX_TIMER64P0_BASE, SZ_4K),
		.irq = {
		DEFINE_RES_IRQ(DAVINCI_INTC_IRQ(IRQ_DA8XX_TINT12_0)),
		DEFINE_RES_IRQ(DAVINCI_INTC_IRQ(IRQ_DA8XX_TINT34_0)),
		},
		};

		#ifdef CONFIG_CPU_FREQ
		@@ -635,7 +614,6 @@ static const struct davinci_soc_info davinci_soc_info_da850 = {
		.pinmux_base = DA8XX_SYSCFG0_BASE + 0x120,
		.pinmux_pins = da850_pins,
		.pinmux_pins_num = ARRAY_SIZE(da850_pins),
		.timer_info = &da850_timer_info,
		.emac_pdata = &da8xx_emac_pdata,
		.sram_dma = DA8XX_SHARED_RAM_BASE,
		.sram_len = SZ_128K,
		@@ -672,6 +650,7 @@ void __init da850_init_time(void)
		void __iomem *pll0;
		struct regmap *cfgchip;
		struct clk *clk;
		int rv;

		clk_register_fixed_rate(NULL, "ref_clk", NULL, 0, DA850_REF_FREQ);

		@@ -686,7 +665,8 @@ void __init da850_init_time(void)
		return;
		}

		davinci_timer_init(clk);
		rv = davinci_timer_register(clk, &da850_timer_cfg);
		WARN(rv, "Unable to register the timer: %d\n", rv);
		}

		static struct resource da850_pll1_resources[] = {

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