+20
−10
Loading
Gitlab 现已全面支持 git over ssh 与 git over https。通过 HTTPS 访问请配置带有 read_repository / write_repository 权限的 Personal access token。通过 SSH 端口访问请使用 22 端口或 13389 端口。如果使用CAS注册了账户但不知道密码,可以自行至设置中更改;如有其他问题,请发邮件至 service@cra.moe 寻求协助。
Merge tag 'imx-clk-5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into clk-imx Pull i.MX clk driver changes from Shawn Guo: - A series from Abel Vesa to switch i.MX6 and i.MX7 clock drivers to clk_hw based API - Add GPIO, SNVS and GIC clocks for i.MX8 drivers - Create a common function imx_mmdc_mask_handshake() for masking MMDC handshake - Drop __init for function imx_check_clocks() and imx_register_uart_clocks(), so that they can be used by i.MX8 clock drivers which use driver model - Use devm_platform_ioremap_resource() instead of of_iomap() for imx8mq clock driver - Mark imx6sx/ul/ull/sll MMDC_P1_IPG and imx8mm DRAM_APB as critical clock. - Correct imx7ulp nic1_bus_clk and imx8mm audio_pll2_clk clock setting * tag 'imx-clk-5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (38 commits) clk: imx8mq: Keep uart clocks on during system boot clk: imx: Remove __init for imx_register_uart_clocks() API clk: imx6q: fix section mismatch warning clk: imx8mq: Use devm_platform_ioremap_resource() instead of of_iomap() clk: imx8mq: Use imx_check_clocks() API directly clk: imx: Remove __init for imx_check_clocks() API clk: imx6sll: Switch to clk_hw based API clk: imx7d: Switch to clk_hw based API clk: imx6ul: Switch to clk_hw based API clk: imx6sx: Switch to clk_hw based API clk: imx6q: Switch to clk_hw based API clk: imx6sl: Switch to clk_hw based API clk: imx: Switch wrappers to clk_hw based API clk: imx: clk-fixup-mux: Switch to clk_hw based API clk: imx: clk-fixup-div: Switch to clk_hw based API clk: imx: clk-gate-exclusive: Switch to clk_hw based API clk: imx: clk-pfd: Switch to clk_hw based API clk: imx: clk-pllv3: Switch to clk_hw based API clk: imx: clk-gate2: Switch to clk_hw based API clk: imx: clk-cpu: Switch to clk_hw based API ...
CRA Git | Maintained and supported by SUSTech CRA and CCSE