Commit 765e7cd9 authored Mar 06, 2020 by Radhakrishna Sripada Committed by José Roberto de Souza Mar 10, 2020

drm/i915/display: Do not write in removed FBC fence registers



Platforms without fences don't have FBC host tracking and those
registers are marked as reserved in those platforms.

v2: checking num_fences to write to FBC fence registers (Ville)

Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200306185833.53984-2-jose.souza@intel.com

parent dff8ba1c

drivers/gpu/drm/i915/display/intel_fbc.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -321,7 +321,7 @@ static void gen7_fbc_activate(struct drm_i915_private *dev_priv)
		SNB_CPU_FENCE_ENABLE \| params->fence_id);
		intel_de_write(dev_priv, DPFC_CPU_FENCE_OFFSET,
		params->crtc.fence_y_offset);
		} else {
		} else if (dev_priv->ggtt.num_fences) {
		intel_de_write(dev_priv, SNB_DPFC_CTL_SA, 0);
		intel_de_write(dev_priv, DPFC_CPU_FENCE_OFFSET, 0);
		}

Admin message