ARC: [mm] micro-optimize page size icache invalidate (764531cc) · Commits · 戴 / test

start address is already page aligned and size is const PAGE_SIZE, thus fixups for alignment not needed in generated code. bloat-o-meter vmlinux-mm5 vmlinux add/remove: 0/0 grow/shrink: 0/1 up/down: 0/-32 (-32) function old new delta __inv_icache_page 82 50 -32 Signed-off-by:

Vineet Gupta <vgupta@synopsys.com>

arch/arc/mm/cache_arc700.c

+12 −3

Original line number	Diff line number	Diff line
		@@ -406,9 +406,18 @@ static void __ic_line_inv_vaddr(unsigned long phy_start, unsigned long vaddr,
		int num_lines, slack;
		unsigned int addr;

		/*
		* Ensure we properly floor/ceil the non-line aligned/sized requests:
		* However page sized flushes can be compile time optimised.
		* -@phy_start will be cache-line aligned already (being page aligned)
		* -@sz will be integral multiple of line size (being page sized).
		*/
		if (!(__builtin_constant_p(sz) && sz == PAGE_SIZE)) {
		slack = phy_start & ~ICACHE_LINE_MASK;
		sz += slack;
		phy_start -= slack;
		}

		num_lines = DIV_ROUND_UP(sz, ARC_ICACHE_LINE_LEN);

		#if (CONFIG_ARC_MMU_VER > 2)

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