Commit 76306f42 authored by Paul Burton's avatar Paul Burton
Browse files

MIPS: introduce cpu_coherent_mask 



Add a mask of CPUs which are currently known to be operating coherently.
This is setup initially to be all present CPUs, but in a subsequent
patch CPUs in a MIPS Coherent Processing System will be cleared in this
mask as they enter non-coherent idle states. This will be used in order
to determine when a CPU within a CPS system may need to be powered back
up, but may also be used in future to optimise away wakeups for cache
operations or TLB invalidations.

Signed-off-by: default avatarPaul Burton <paul.burton@imgtec.com>
parent cc7964af

arch/mips/include/asm/smp.h

+3 −0
Original line number Diff line number Diff line
@@ -46,6 +46,9 @@ extern int __cpu_logical_map[NR_CPUS]; 


extern volatile cpumask_t cpu_callin_map;



/* Mask of CPUs which are currently definitely operating coherently */

extern cpumask_t cpu_coherent_mask;



extern void asmlinkage smp_bootstrap(void);



/*

arch/mips/kernel/smp.c

+4 −0
Original line number Diff line number Diff line
@@ -66,6 +66,8 @@ EXPORT_SYMBOL(cpu_sibling_map); 
/* representing cpus for which sibling maps can be computed */

static cpumask_t cpu_sibling_setup_map;



cpumask_t cpu_coherent_mask;



static inline void set_cpu_sibling_map(int cpu)

{

	int i;
@@ -124,6 +126,7 @@ asmlinkage void start_secondary(void) 
	cpu = smp_processor_id();

	cpu_data[cpu].udelay_val = loops_per_jiffy;



	cpu_set(cpu, cpu_coherent_mask);

	notify_cpu_starting(cpu);



	set_cpu_online(cpu, true);
@@ -186,6 +189,7 @@ void __init smp_prepare_cpus(unsigned int max_cpus) 
#ifndef CONFIG_HOTPLUG_CPU

	init_cpu_present(cpu_possible_mask);

#endif

	cpumask_copy(&cpu_coherent_mask, cpu_possible_mask);

}



/* preload SMP state for boot cpu */

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