Commit 761c5867 authored by Alexandre Belloni's avatar Alexandre Belloni
Browse files

ARM: at91/dt: sama5d2: use slow clock where necessary 



The watchdog, the reset controller, the RTC, the shutdown controller, the
timer counters and the LCD PWM need the slow clock, add it to the currently
defined nodes.

Signed-off-by: default avatarAlexandre Belloni <alexandre.belloni@free-electrons.com>
parent 921f9a6c

arch/arm/boot/dts/sama5d2.dtsi

+5 −4
Original line number Original line Diff line number Diff line
@@ -764,16 +764,16 @@ 
				compatible = "atmel,at91sam9x5-tcb";

				compatible = "atmel,at91sam9x5-tcb";

				reg = <0xf800c000 0x100>;

				reg = <0xf800c000 0x100>;

				interrupts = <35 IRQ_TYPE_LEVEL_HIGH 0>;

				interrupts = <35 IRQ_TYPE_LEVEL_HIGH 0>;

				clocks = <&tcb0_clk>;

				clocks = <&tcb0_clk>, <&clk32k>;

				clock-names = "t0_clk";

				clock-names = "t0_clk", "slow_clk";

			};

			};





			tcb1: timer@f8010000 {

			tcb1: timer@f8010000 {

				compatible = "atmel,at91sam9x5-tcb";

				compatible = "atmel,at91sam9x5-tcb";

				reg = <0xf8010000 0x100>;

				reg = <0xf8010000 0x100>;

				interrupts = <36 IRQ_TYPE_LEVEL_HIGH 0>;

				interrupts = <36 IRQ_TYPE_LEVEL_HIGH 0>;

				clocks = <&tcb1_clk>;

				clocks = <&tcb1_clk>, <&clk32k>;

				clock-names = "t0_clk";

				clock-names = "t0_clk", "slow_clk";

			};

			};





			uart0: serial@f801c000 {

			uart0: serial@f801c000 {
@@ -857,6 +857,7 @@ 
				compatible = "atmel,at91rm9200-rtc";

				compatible = "atmel,at91rm9200-rtc";

				reg = <0xf80480b0 0x30>;

				reg = <0xf80480b0 0x30>;

				interrupts = <74 IRQ_TYPE_LEVEL_HIGH 7>;

				interrupts = <74 IRQ_TYPE_LEVEL_HIGH 7>;

				clocks = <&clk32k>;

			};

			};





			spi1: spi@fc000000 {

			spi1: spi@fc000000 {

CRA Git | Maintained and supported by SUSTech CRA and CCSE