Commit 75f28718 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'arm-soc/for-4.5/soc' of http://github.com/Broadcom/stblinux into next/soc

Merge "Broadcom soc changes for v4.5" from Florian Fainelli:

This pull request contains Broadcom SoC changes for 4.5, with the following changes:

- Lucas Stach removes the workaround for an imprecise fault for Broadcom
  BCM5301x SoCs (Northstar) since this is now handled by the ARM/Linux kernel
  directly

- Hauke Merthens enables a bunch of erratas for the Cortex-A9 and PL310 L2
  cache present on early Northstar chips (BCM4708)

- Kapil Hali adds SMP support for the Northstar Plus SoCs by consolidating the
  existing SMP code for Kona SoCs (mobile platforms), fixng the Device Tree
  binding for the Kona platforms (wrong placement for 'enable-method' and
  'secondary-reg') and then finally adds the functional code for the Northstar
  Plus platforms to boot their secondary CPUs

- Jon Mason enables SMP on BCM4708/BCM5301X (Northstar SoCs) by building the generic
  Northstar/Northstar Plus SMP code, and adding the relevant SMP Device Tree nodes

* tag 'arm-soc/for-4.5/soc' of http://github.com/Broadcom/stblinux:
  ARM: BCM: Add SMP support for Broadcom 4708
  ARM: BCM: Add SMP support for Broadcom NSP
  ARM: BCM: Clean up SMP support for Broadcom Kona
  ARM: BCM5310X: activate erratas needed for SoC
  ARM: BCM5301X: remove workaround imprecise abort fault handler
parents 31ade3b8 99498905
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+1 −1
Original line number Diff line number Diff line
@@ -31,7 +31,6 @@
		#address-cells = <1>;
		#size-cells = <0>;
		enable-method = "brcm,bcm11351-cpu-method";
		secondary-boot-reg = <0x3500417c>;

		cpu0: cpu@0 {
			device_type = "cpu";
@@ -42,6 +41,7 @@
		cpu1: cpu@1 {
			device_type = "cpu";
			compatible = "arm,cortex-a9";
			secondary-boot-reg = <0x3500417c>;
			reg = <1>;
		};
	};
+1 −1
Original line number Diff line number Diff line
@@ -31,7 +31,6 @@
		#address-cells = <1>;
		#size-cells = <0>;
		enable-method = "brcm,bcm11351-cpu-method";
		secondary-boot-reg = <0x35004178>;

		cpu0: cpu@0 {
			device_type = "cpu";
@@ -42,6 +41,7 @@
		cpu1: cpu@1 {
			device_type = "cpu";
			compatible = "arm,cortex-a9";
			secondary-boot-reg = <0x35004178>;
			reg = <1>;
		};
	};
+2 −0
Original line number Diff line number Diff line
@@ -15,6 +15,7 @@
	cpus {
		#address-cells = <1>;
		#size-cells = <0>;
		enable-method = "brcm,bcm-nsp-smp";

		cpu@0 {
			device_type = "cpu";
@@ -27,6 +28,7 @@
			device_type = "cpu";
			compatible = "arm,cortex-a9";
			next-level-cache = <&L2>;
			secondary-boot-reg = <0xffff0400>;
			reg = <0x1>;
		};
	};
+7 −0
Original line number Diff line number Diff line
@@ -40,6 +40,8 @@ config ARCH_BCM_NSP
	select ARCH_BCM_IPROC
	select ARM_ERRATA_754322
	select ARM_ERRATA_775420
	select ARM_ERRATA_764369 if SMP
	select HAVE_SMP
	help
	  Support for Broadcom Northstar Plus SoC.
	  Broadcom Northstar Plus family of SoCs are used for switching control
@@ -52,6 +54,11 @@ config ARCH_BCM_NSP
config ARCH_BCM_5301X
	bool "Broadcom BCM470X / BCM5301X ARM SoC" if ARCH_MULTI_V7
	select ARCH_BCM_IPROC
	select ARM_ERRATA_754322
	select ARM_ERRATA_775420
	select ARM_ERRATA_764369 if SMP
	select HAVE_SMP

	help
	  Support for Broadcom BCM470X and BCM5301X SoCs with ARM CPU cores.

+9 −2
Original line number Diff line number Diff line
@@ -16,6 +16,10 @@ obj-$(CONFIG_ARCH_BCM_CYGNUS) += bcm_cygnus.o
# Northstar Plus
obj-$(CONFIG_ARCH_BCM_NSP)	+= bcm_nsp.o

ifeq ($(CONFIG_ARCH_BCM_NSP),y)
obj-$(CONFIG_SMP)		+= platsmp.o
endif

# BCM281XX
obj-$(CONFIG_ARCH_BCM_281XX)	+= board_bcm281xx.o

@@ -23,7 +27,7 @@ obj-$(CONFIG_ARCH_BCM_281XX) += board_bcm281xx.o
obj-$(CONFIG_ARCH_BCM_21664)	+= board_bcm21664.o

# BCM281XX and BCM21664 SMP support
obj-$(CONFIG_ARCH_BCM_MOBILE_SMP) += kona_smp.o
obj-$(CONFIG_ARCH_BCM_MOBILE_SMP) += platsmp.o

# BCM281XX and BCM21664 L2 cache control
obj-$(CONFIG_ARCH_BCM_MOBILE_L2_CACHE) += kona_l2_cache.o
@@ -39,6 +43,9 @@ obj-$(CONFIG_ARCH_BCM2835) += board_bcm2835.o

# BCM5301X
obj-$(CONFIG_ARCH_BCM_5301X)	+= bcm_5301x.o
ifeq ($(CONFIG_ARCH_BCM_5301X),y)
obj-$(CONFIG_SMP)		+= platsmp.o
endif

# BCM63XXx
ifeq ($(CONFIG_ARCH_BCM_63XX),y)
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