drm/msm/dpu: maintain hw_mdp in kms (7579cb05) · Commits · 戴 / test

drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c

+7 −4

Original line number	Diff line number	Diff line
		@@ -627,6 +627,10 @@ static void _dpu_kms_hw_destroy(struct dpu_kms *dpu_kms)
		devm_iounmap(&dpu_kms->pdev->dev, dpu_kms->vbif[VBIF_RT]);
		dpu_kms->vbif[VBIF_RT] = NULL;

		if (dpu_kms->hw_mdp)
		dpu_hw_mdp_destroy(dpu_kms->hw_mdp);
		dpu_kms->hw_mdp = NULL;

		if (dpu_kms->mmio)
		devm_iounmap(&dpu_kms->pdev->dev, dpu_kms->mmio);
		dpu_kms->mmio = NULL;
		@@ -885,11 +889,10 @@ static int dpu_kms_hw_init(struct msm_kms *kms)

		dpu_kms->rm_init = true;

		dpu_kms->hw_mdp = dpu_rm_get_mdp(&dpu_kms->rm);
		if (IS_ERR_OR_NULL(dpu_kms->hw_mdp)) {
		dpu_kms->hw_mdp = dpu_hw_mdptop_init(MDP_TOP, dpu_kms->mmio,
		dpu_kms->catalog);
		if (IS_ERR(dpu_kms->hw_mdp)) {
		rc = PTR_ERR(dpu_kms->hw_mdp);
		if (!dpu_kms->hw_mdp)
		rc = -EINVAL;
		DPU_ERROR("failed to get hw_mdp: %d\n", rc);
		dpu_kms->hw_mdp = NULL;
		goto power_error;

+0 −20

Original line number	Diff line number	Diff line
		@@ -49,11 +49,6 @@ struct dpu_rm_hw_blk {
		struct dpu_hw_blk *hw;
		};

		struct dpu_hw_mdp dpu_rm_get_mdp(struct dpu_rm rm)
		{
		return rm->hw_mdp;
		}

		void dpu_rm_init_hw_iter(
		struct dpu_rm_hw_iter *iter,
		uint32_t enc_id,
		@@ -148,9 +143,6 @@ int dpu_rm_destroy(struct dpu_rm *rm)
		}
		}

		dpu_hw_mdp_destroy(rm->hw_mdp);
		rm->hw_mdp = NULL;

		mutex_destroy(&rm->rm_lock);

		return 0;
		@@ -165,11 +157,8 @@ static int _dpu_rm_hw_blk_create(
		void *hw_catalog_info)
		{
		struct dpu_rm_hw_blk *blk;
		struct dpu_hw_mdp *hw_mdp;
		void *hw;

		hw_mdp = rm->hw_mdp;

		switch (type) {
		case DPU_HW_BLK_LM:
		hw = dpu_hw_lm_init(id, mmio, cat);
		@@ -233,15 +222,6 @@ int dpu_rm_init(struct dpu_rm *rm,
		for (type = 0; type < DPU_HW_BLK_MAX; type++)
		INIT_LIST_HEAD(&rm->hw_blks[type]);

		/* Some of the sub-blocks require an mdptop to be created */
		rm->hw_mdp = dpu_hw_mdptop_init(MDP_TOP, mmio, cat);
		if (IS_ERR_OR_NULL(rm->hw_mdp)) {
		rc = PTR_ERR(rm->hw_mdp);
		rm->hw_mdp = NULL;
		DPU_ERROR("failed: mdp hw not available\n");
		goto fail;
		}

		/* Interrogate HW catalog and create tracking items for hw blocks */
		for (i = 0; i < cat->mixer_count; i++) {
		struct dpu_lm_cfg *lm = &cat->mixer[i];

+0 −10

Original line number	Diff line number	Diff line
		@@ -24,13 +24,11 @@
		* struct dpu_rm - DPU dynamic hardware resource manager
		* @hw_blks: array of lists of hardware resources present in the system, one
		* list per type of hardware block
		* @hw_mdp: hardware object for mdp_top
		* @lm_max_width: cached layer mixer maximum width
		* @rm_lock: resource manager mutex
		*/
		struct dpu_rm {
		struct list_head hw_blks[DPU_HW_BLK_MAX];
		struct dpu_hw_mdp *hw_mdp;
		uint32_t lm_max_width;
		struct mutex rm_lock;
		};
		@@ -103,14 +101,6 @@ int dpu_rm_reserve(struct dpu_rm *rm,
		*/
		void dpu_rm_release(struct dpu_rm rm, struct drm_encoder enc);

		/**
		* dpu_rm_get_mdp - Retrieve HW block for MDP TOP.
		* This is never reserved, and is usable by any display.
		* @rm: DPU Resource Manager handle
		* @Return: Pointer to hw block or NULL
		*/
		struct dpu_hw_mdp dpu_rm_get_mdp(struct dpu_rm rm);

		/**
		* dpu_rm_init_hw_iter - setup given iterator for new iteration over hw list
		* using dpu_rm_get_hw