Commit 75427b2a authored Aug 28, 2019 by Ville Syrjälä

drm/i915: Limit MST to <= 8bpc once again



My attempt at allowing MST to use the higher color depths has
regressed some configurations. Apparently people have setups
where all MST streams will fit into the DP link with 8bpc but
won't fit with higher color depths.

What we really should be doing is reducing the bpc for all the
streams on the same link until they start to fit. But that requires
a bit more work, so in the meantime let's revert back closer to
the old behavior and limit MST to at most 8bpc.

Cc: stable@vger.kernel.org
Cc: Lyude Paul <lyude@redhat.com>
Tested-by: Geoffrey Bennett <gmux22@gmail.com>
Fixes: f1477219 ("drm/i915: Remove the 8bpc shackles from DP MST")
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111505


Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190828102059.2512-1-ville.syrjala@linux.intel.com


Reviewed-by: Lyude Paul <lyude@redhat.com>

parent dffa8feb

drivers/gpu/drm/i915/display/intel_dp_mst.c

+9 −1

Original line number	Diff line number	Diff line
		@@ -128,7 +128,15 @@ static int intel_dp_mst_compute_config(struct intel_encoder *encoder,
		limits.max_lane_count = intel_dp_max_lane_count(intel_dp);

		limits.min_bpp = intel_dp_min_bpp(pipe_config);
		limits.max_bpp = pipe_config->pipe_bpp;
		/*
		* FIXME: If all the streams can't fit into the link with
		* their current pipe_bpp we should reduce pipe_bpp across
		* the board until things start to fit. Until then we
		* limit to <= 8bpc since that's what was hardcoded for all
		* MST streams previously. This hack should be removed once
		* we have the proper retry logic in place.
		*/
		limits.max_bpp = min(pipe_config->pipe_bpp, 24);

		intel_dp_adjust_compliance_config(intel_dp, pipe_config, &limits);

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