ASoC: Intel: Skylake: Reset DSP Pipelines in prepare

{

	struct skl *skl = get_skl_ctx(dai->dev);

	struct skl_module_cfg *mconfig;

	int ret;

	dev_dbg(dai->dev, "%s: %s\n", __func__, dai->name);

	mconfig = skl_tplg_fe_get_cpr_module(dai, substream->stream);

	/* In case of XRUN recovery, reset the FW pipe to clean state */

	if (mconfig && (substream->runtime->status->state ==

					SNDRV_PCM_STATE_XRUN))

		skl_reset_pipe(skl->skl_sst, mconfig->pipe);

	/*

	 * In case of XRUN recovery or in the case when the application

	 * calls prepare another time, reset the FW pipe to clean state

	 */

	if (mconfig &&

		(substream->runtime->status->state == SNDRV_PCM_STATE_XRUN ||

		 mconfig->pipe->state == SKL_PIPE_CREATED ||

		 mconfig->pipe->state == SKL_PIPE_PAUSED)) {

		ret = skl_reset_pipe(skl->skl_sst, mconfig->pipe);

		if (ret < 0)

			return ret;

		ret = skl_pcm_host_dma_prepare(dai->dev,

					mconfig->pipe->p_params);

		if (ret < 0)

			return ret;

	}

	return 0;

}