Commit 74ded659 authored by Alexander Shiyan's avatar Alexander Shiyan Committed by Shawn Guo
Browse files

ARM: dts: imx27-phytec-phycore-som: Add USBOTG node



This patch adds USBOTG devicetree node of Phytec PCM038 module.

Signed-off-by: default avatarAlexander Shiyan <shc_work@mail.ru>
Signed-off-by: default avatarShawn Guo <shawn.guo@linaro.org>
parent 9089ce52
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+30 −0
Original line number Diff line number Diff line
@@ -250,6 +250,23 @@
				MX27_PAD_NFWE_B__NFWE_B 0x0
			>;
		};

		pinctrl_usbotg: usbotggrp {
			fsl,pins = <
				MX27_PAD_USBOTG_CLK__USBOTG_CLK 0x0
				MX27_PAD_USBOTG_DIR__USBOTG_DIR 0x0
				MX27_PAD_USBOTG_NXT__USBOTG_NXT 0x0
				MX27_PAD_USBOTG_STP__USBOTG_STP 0x0
				MX27_PAD_USBOTG_DATA0__USBOTG_DATA0 0x0
				MX27_PAD_USBOTG_DATA1__USBOTG_DATA1 0x0
				MX27_PAD_USBOTG_DATA2__USBOTG_DATA2 0x0
				MX27_PAD_USBOTG_DATA3__USBOTG_DATA3 0x0
				MX27_PAD_USBOTG_DATA4__USBOTG_DATA4 0x0
				MX27_PAD_USBOTG_DATA5__USBOTG_DATA5 0x0
				MX27_PAD_USBOTG_DATA6__USBOTG_DATA6 0x0
				MX27_PAD_USBOTG_DATA7__USBOTG_DATA7 0x0
			>;
		};
	};
};

@@ -262,6 +279,19 @@
	status = "okay";
};

&usbotg {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usbotg>;
	dr_mode = "otg";
	phy_type = "ulpi";
	vbus-supply = <&sw3_reg>;
	status = "okay";
};

&usbphy0 {
	vcc-supply = <&sw3_reg>;
};

&weim {
	status = "okay";