dt-bindings: phy: add UniPhier PCIe PHY description

Socionext UniPhier PCIe PHY bindings

This describes the devicetree bindings for PHY interface built into

PCIe controller implemented on Socionext UniPhier SoCs.

Required properties:

- compatible: Should contain one of the following:

    "socionext,uniphier-ld20-pcie-phy" - for LD20 PHY

    "socionext,uniphier-pxs3-pcie-phy" - for PXs3 PHY

- reg: Specifies offset and length of the register set for the device.

- #phy-cells: Must be zero.

- clocks: A phandle to the clock gate for PCIe glue layer including

	this phy.

- resets: A phandle to the reset line for PCIe glue layer including

	this phy.

Optional properties:

- socionext,syscon: A phandle to system control to set configurations

	for phy.

Refer to phy/phy-bindings.txt for the generic PHY binding properties.

Example:

	pcie_phy: phy@66038000 {

		compatible = "socionext,uniphier-ld20-pcie-phy";

		reg = <0x66038000 0x4000>;

		#phy-cells = <0>;

		clocks = <&sys_clk 24>;

		resets = <&sys_rst 24>;

		socionext,syscon = <&soc_glue>;

	};