Commit 7484c727 authored by Linus Walleij's avatar Linus Walleij
Browse files

ARM: realview: delete the RealView board files 



The device tree boot is now feature-complete and fully working,
so remove all the RealView board files. Move the remaining
realview_cpu_die() function frome "core.h" to the new "hotplug.h"
and leave just a minimal device tree core.

Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent 29b4817d

arch/arm/mach-realview/Makefile

+0 −10
Original line number Diff line number Diff line
@@ -4,16 +4,6 @@ 
ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/$(src)/include \

	-I$(srctree)/arch/arm/plat-versatile/include



obj-y					:= core.o

obj-$(CONFIG_REALVIEW_DT)		+= realview-dt.o

obj-$(CONFIG_SMP)			+= platsmp-dt.o



ifdef CONFIG_ATAGS

obj-$(CONFIG_MACH_REALVIEW_EB)		+= realview_eb.o

obj-$(CONFIG_MACH_REALVIEW_PB11MP)	+= realview_pb11mp.o

obj-$(CONFIG_MACH_REALVIEW_PB1176)	+= realview_pb1176.o

obj-$(CONFIG_MACH_REALVIEW_PBA8)	+= realview_pba8.o

obj-$(CONFIG_MACH_REALVIEW_PBX)		+= realview_pbx.o

obj-$(CONFIG_SMP)			+= platsmp.o

endif

obj-$(CONFIG_HOTPLUG_CPU)		+= hotplug.o

arch/arm/mach-realview/board-eb.h

deleted100644 → 0
+0 −94
Original line number Diff line number Diff line 
/*

 * Copyright (C) 2007 ARM Limited

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 as

 * published by the Free Software Foundation.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 *

 * You should have received a copy of the GNU General Public License

 * along with this program; if not, write to the Free Software

 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,

 * MA 02110-1301, USA.

 */



#ifndef __ASM_ARCH_BOARD_EB_H

#define __ASM_ARCH_BOARD_EB_H



#include "platform.h"



/*

 * RealView EB + ARM11MPCore peripheral addresses

 */

#define REALVIEW_EB_UART0_BASE		0x10009000	/* UART 0 */

#define REALVIEW_EB_UART1_BASE		0x1000A000	/* UART 1 */

#define REALVIEW_EB_UART2_BASE		0x1000B000	/* UART 2 */

#define REALVIEW_EB_UART3_BASE		0x1000C000	/* UART 3 */

#define REALVIEW_EB_SSP_BASE		0x1000D000	/* Synchronous Serial Port */

#define REALVIEW_EB_WATCHDOG_BASE	0x10010000	/* watchdog interface */

#define REALVIEW_EB_TIMER0_1_BASE	0x10011000	/* Timer 0 and 1 */

#define REALVIEW_EB_TIMER2_3_BASE	0x10012000	/* Timer 2 and 3 */

#define REALVIEW_EB_GPIO0_BASE		0x10013000	/* GPIO port 0 */

#define REALVIEW_EB_RTC_BASE		0x10017000	/* Real Time Clock */

#define REALVIEW_EB_CLCD_BASE		0x10020000	/* CLCD */

#define REALVIEW_EB_GIC_CPU_BASE	0x10040000	/* Generic interrupt controller CPU interface */

#define REALVIEW_EB_GIC_DIST_BASE	0x10041000	/* Generic interrupt controller distributor */

#define REALVIEW_EB_SMC_BASE		0x10080000	/* Static memory controller */



#define REALVIEW_EB_FLASH_BASE		0x40000000

#define REALVIEW_EB_FLASH_SIZE		SZ_64M

#define REALVIEW_EB_ETH_BASE		0x4E000000	/* Ethernet */

#define REALVIEW_EB_USB_BASE		0x4F000000	/* USB */



#ifdef CONFIG_REALVIEW_EB_ARM11MP_REVB

#define REALVIEW_EB11MP_PRIV_MEM_BASE	0x10100000

#define REALVIEW_EB11MP_L220_BASE	0x10102000	/* L220 registers */

#define REALVIEW_EB11MP_SYS_PLD_CTRL1	0xD8		/* Register offset for MPCore sysctl */

#else

#define REALVIEW_EB11MP_PRIV_MEM_BASE	0x1F000000

#define REALVIEW_EB11MP_L220_BASE	0x1F002000	/* L220 registers */

#define REALVIEW_EB11MP_SYS_PLD_CTRL1	0x74		/* Register offset for MPCore sysctl */

#endif



#define REALVIEW_EB11MP_PRIV_MEM_SIZE	SZ_8K

#define REALVIEW_EB11MP_PRIV_MEM_OFF(x)	(REALVIEW_EB11MP_PRIV_MEM_BASE + (x))



#define REALVIEW_EB11MP_SCU_BASE	REALVIEW_EB11MP_PRIV_MEM_OFF(0)		/* SCU registers */

#define REALVIEW_EB11MP_GIC_CPU_BASE	REALVIEW_EB11MP_PRIV_MEM_OFF(0x0100)	/* Generic interrupt controller CPU interface */

#define REALVIEW_EB11MP_TWD_BASE	REALVIEW_EB11MP_PRIV_MEM_OFF(0x0600)

#define REALVIEW_EB11MP_GIC_DIST_BASE	REALVIEW_EB11MP_PRIV_MEM_OFF(0x1000)	/* Generic interrupt controller distributor */



/*

 * Core tile identification (REALVIEW_SYS_PROCID)

 */

#define REALVIEW_EB_PROC_MASK		0xFF000000

#define REALVIEW_EB_PROC_ARM7TDMI	0x00000000

#define REALVIEW_EB_PROC_ARM9		0x02000000

#define REALVIEW_EB_PROC_ARM11		0x04000000

#define REALVIEW_EB_PROC_ARM11MP	0x06000000

#define REALVIEW_EB_PROC_A9MP		0x0C000000



#define check_eb_proc(proc_type)						\

	((readl(__io_address(REALVIEW_SYS_PROCID)) & REALVIEW_EB_PROC_MASK)	\

	 == proc_type)



#ifdef CONFIG_REALVIEW_EB_ARM11MP

#define core_tile_eb11mp()	check_eb_proc(REALVIEW_EB_PROC_ARM11MP)

#else

#define core_tile_eb11mp()	0

#endif



#ifdef CONFIG_REALVIEW_EB_A9MP

#define core_tile_a9mp()	check_eb_proc(REALVIEW_EB_PROC_A9MP)

#else

#define core_tile_a9mp()	0

#endif



#define machine_is_realview_eb_mp() \

	(machine_is_realview_eb() && (core_tile_eb11mp() || core_tile_a9mp()))



#endif	/* __ASM_ARCH_BOARD_EB_H */

arch/arm/mach-realview/board-pb1176.h

deleted100644 → 0
+0 −81
Original line number Diff line number Diff line 
/*

 * Copyright (C) 2008 ARM Limited

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 as

 * published by the Free Software Foundation.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 *

 * You should have received a copy of the GNU General Public License

 * along with this program; if not, write to the Free Software

 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,

 * MA 02110-1301, USA.

 */



#ifndef __ASM_ARCH_BOARD_PB1176_H

#define __ASM_ARCH_BOARD_PB1176_H



#include "platform.h"



/*

 * Peripheral addresses

 */

#define REALVIEW_PB1176_UART4_BASE		0x10009000 /* UART 4 */

#define REALVIEW_PB1176_SCTL_BASE		0x10100000 /* System controller */

#define REALVIEW_PB1176_SMC_BASE		0x10111000 /* SMC */

#define REALVIEW_PB1176_DMC_BASE		0x10109000 /* DMC configuration */

#define REALVIEW_PB1176_SDRAM67_BASE		0x70000000 /* SDRAM banks 6 and 7 */

#define REALVIEW_PB1176_FLASH_BASE		0x30000000

#define REALVIEW_PB1176_FLASH_SIZE		SZ_64M

#define REALVIEW_PB1176_SEC_FLASH_BASE		0x3C000000 /* Secure flash */

#define REALVIEW_PB1176_SEC_FLASH_SIZE		SZ_64M



#define REALVIEW_PB1176_TIMER0_1_BASE		0x10104000 /* Timer 0 and 1 */

#define REALVIEW_PB1176_TIMER2_3_BASE		0x10105000 /* Timer 2 and 3 */

#define REALVIEW_PB1176_TIMER4_5_BASE		0x10106000 /* Timer 4 and 5 */

#define REALVIEW_PB1176_WATCHDOG_BASE		0x10107000 /* watchdog interface */

#define REALVIEW_PB1176_RTC_BASE		0x10108000 /* Real Time Clock */

#define REALVIEW_PB1176_GPIO0_BASE		0x1010A000 /* GPIO port 0 */

#define REALVIEW_PB1176_SSP_BASE		0x1010B000 /* Synchronous Serial Port */

#define REALVIEW_PB1176_UART0_BASE		0x1010C000 /* UART 0 */

#define REALVIEW_PB1176_UART1_BASE		0x1010D000 /* UART 1 */

#define REALVIEW_PB1176_UART2_BASE		0x1010E000 /* UART 2 */

#define REALVIEW_PB1176_UART3_BASE		0x1010F000 /* UART 3 */

#define REALVIEW_PB1176_CLCD_BASE		0x10112000 /* CLCD */

#define REALVIEW_PB1176_ETH_BASE		0x3A000000 /* Ethernet */

#define REALVIEW_PB1176_USB_BASE		0x3B000000 /* USB */



/*

 * PCI regions

 */

#define REALVIEW_PB1176_PCI_BASE		0x60000000 /* PCI self config */

#define REALVIEW_PB1176_PCI_CFG_BASE		0x61000000 /* PCI config */

#define REALVIEW_PB1176_PCI_IO_BASE0		0x62000000 /* PCI IO region */

#define REALVIEW_PB1176_PCI_MEM_BASE0		0x63000000 /* Memory region 1 */

#define REALVIEW_PB1176_PCI_MEM_BASE1		0x64000000 /* Memory region 2 */

#define REALVIEW_PB1176_PCI_MEM_BASE2		0x68000000 /* Memory region 3 */



#define REALVIEW_PB1176_PCI_BASE_SIZE		0x01000000 /* 16MB */

#define REALVIEW_PB1176_PCI_CFG_BASE_SIZE	0x01000000 /* 16MB */

#define REALVIEW_PB1176_PCI_IO_BASE0_SIZE	0x01000000 /* 16MB */

#define REALVIEW_PB1176_PCI_MEM_BASE0_SIZE	0x01000000 /* 16MB */

#define REALVIEW_PB1176_PCI_MEM_BASE1_SIZE	0x04000000 /* 64MB */

#define REALVIEW_PB1176_PCI_MEM_BASE2_SIZE	0x08000000 /* 128MB */



#define REALVIEW_DC1176_GIC_CPU_BASE		0x10120000 /* GIC CPU interface, on devchip */

#define REALVIEW_DC1176_GIC_DIST_BASE		0x10121000 /* GIC distributor, on devchip */

#define REALVIEW_DC1176_ROM_BASE		0x10200000 /* 16KiB NRAM preudo-ROM, on devchip */

#define REALVIEW_PB1176_GIC_CPU_BASE		0x10040000 /* GIC CPU interface, on FPGA */

#define REALVIEW_PB1176_GIC_DIST_BASE		0x10041000 /* GIC distributor, on FPGA */

#define REALVIEW_PB1176_L220_BASE		0x10110000 /* L220 registers */



/*

 * Control register SYS_RESETCTL Bit 8 is set to 1 to force a soft reset

 */

#define REALVIEW_PB1176_SYS_SOFT_RESET    0x0100



#endif	/* __ASM_ARCH_BOARD_PB1176_H */

arch/arm/mach-realview/board-pb11mp.h

deleted100644 → 0
+0 −96
Original line number Diff line number Diff line 
/*

 * Copyright (C) 2008 ARM Limited

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 as

 * published by the Free Software Foundation.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 *

 * You should have received a copy of the GNU General Public License

 * along with this program; if not, write to the Free Software

 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,

 * MA 02110-1301, USA.

 */



#ifndef __ASM_ARCH_BOARD_PB11MP_H

#define __ASM_ARCH_BOARD_PB11MP_H



#include "platform.h"



/*

 * Peripheral addresses

 */

#define REALVIEW_PB11MP_UART0_BASE		0x10009000	/* UART 0 */

#define REALVIEW_PB11MP_UART1_BASE		0x1000A000	/* UART 1 */

#define REALVIEW_PB11MP_UART2_BASE		0x1000B000	/* UART 2 */

#define REALVIEW_PB11MP_UART3_BASE		0x1000C000	/* UART 3 */

#define REALVIEW_PB11MP_SSP_BASE		0x1000D000	/* Synchronous Serial Port */

#define REALVIEW_PB11MP_WATCHDOG0_BASE		0x1000F000	/* Watchdog 0 */

#define REALVIEW_PB11MP_WATCHDOG_BASE		0x10010000	/* watchdog interface */

#define REALVIEW_PB11MP_TIMER0_1_BASE		0x10011000	/* Timer 0 and 1 */

#define REALVIEW_PB11MP_TIMER2_3_BASE		0x10012000	/* Timer 2 and 3 */

#define REALVIEW_PB11MP_GPIO0_BASE		0x10013000	/* GPIO port 0 */

#define REALVIEW_PB11MP_RTC_BASE		0x10017000	/* Real Time Clock */

#define REALVIEW_PB11MP_TIMER4_5_BASE		0x10018000	/* Timer 4/5 */

#define REALVIEW_PB11MP_TIMER6_7_BASE		0x10019000	/* Timer 6/7 */

#define REALVIEW_PB11MP_SCTL_BASE		0x1001A000	/* System Controller */

#define REALVIEW_PB11MP_CLCD_BASE		0x10020000	/* CLCD */

#define REALVIEW_PB11MP_ONB_SRAM_BASE		0x10060000	/* On-board SRAM */

#define REALVIEW_PB11MP_DMC_BASE		0x100E0000	/* DMC configuration */

#define REALVIEW_PB11MP_SMC_BASE		0x100E1000	/* SMC configuration */

#define REALVIEW_PB11MP_CAN_BASE		0x100E2000	/* CAN bus */

#define REALVIEW_PB11MP_CF_BASE			0x18000000	/* Compact flash */

#define REALVIEW_PB11MP_CF_MEM_BASE		0x18003000	/* SMC for Compact flash */

#define REALVIEW_PB11MP_GIC_CPU_BASE		0x1E000000	/* Generic interrupt controller CPU interface */

#define REALVIEW_PB11MP_FLASH0_BASE		0x40000000

#define REALVIEW_PB11MP_FLASH0_SIZE		SZ_64M

#define REALVIEW_PB11MP_FLASH1_BASE		0x44000000

#define REALVIEW_PB11MP_FLASH1_SIZE		SZ_64M

#define REALVIEW_PB11MP_ETH_BASE		0x4E000000	/* Ethernet */

#define REALVIEW_PB11MP_USB_BASE		0x4F000000	/* USB */

#define REALVIEW_PB11MP_GIC_DIST_BASE		0x1E001000	/* Generic interrupt controller distributor */

#define REALVIEW_PB11MP_LT_BASE			0xC0000000	/* Logic Tile expansion */

#define REALVIEW_PB11MP_SDRAM6_BASE		0x70000000	/* SDRAM bank 6 256MB */

#define REALVIEW_PB11MP_SDRAM7_BASE		0x80000000	/* SDRAM bank 7 256MB */



#define REALVIEW_PB11MP_SYS_PLD_CTRL1		0x74



/*

 * PB11MPCore PCI regions

 */

#define REALVIEW_PB11MP_PCI_BASE		0x90040000	/* PCI-X Unit base */

#define REALVIEW_PB11MP_PCI_IO_BASE		0x90050000	/* IO Region on AHB */

#define REALVIEW_PB11MP_PCI_MEM_BASE		0xA0000000	/* MEM Region on AHB */



#define REALVIEW_PB11MP_PCI_BASE_SIZE		0x10000		/* 16 Kb */

#define REALVIEW_PB11MP_PCI_IO_SIZE		0x1000		/* 4 Kb */

#define REALVIEW_PB11MP_PCI_MEM_SIZE		0x20000000	/* 512 MB */



/*

 * Testchip peripheral and fpga gic regions

 */

#define REALVIEW_TC11MP_PRIV_MEM_BASE		0x1F000000

#define REALVIEW_TC11MP_PRIV_MEM_SIZE		SZ_8K

#define REALVIEW_TC11MP_SCU_BASE		0x1F000000	/* IRQ, Test chip */

#define REALVIEW_TC11MP_GIC_CPU_BASE		0x1F000100	/* Test chip interrupt controller CPU interface */

#define REALVIEW_TC11MP_TWD_BASE		0x1F000600

#define REALVIEW_TC11MP_GIC_DIST_BASE		0x1F001000	/* Test chip interrupt controller distributor */

#define REALVIEW_TC11MP_L220_BASE		0x1F002000	/* L220 registers */



 /*

 * Values for REALVIEW_SYS_RESET_CTRL

 */

#define REALVIEW_PB11MP_SYS_CTRL_RESET_CONFIGCLR    0x01

#define REALVIEW_PB11MP_SYS_CTRL_RESET_CONFIGINIT   0x02

#define REALVIEW_PB11MP_SYS_CTRL_RESET_DLLRESET     0x03

#define REALVIEW_PB11MP_SYS_CTRL_RESET_PLLRESET     0x04

#define REALVIEW_PB11MP_SYS_CTRL_RESET_POR          0x05

#define REALVIEW_PB11MP_SYS_CTRL_RESET_DoC          0x06



#define REALVIEW_PB11MP_SYS_CTRL_LED         (1 << 0)



#endif	/* __ASM_ARCH_BOARD_PB11MP_H */

arch/arm/mach-realview/board-pba8.h

deleted100644 → 0
+0 −71
Original line number Diff line number Diff line 
/*

 * Copyright (C) 2008 ARM Limited

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 as

 * published by the Free Software Foundation.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 *

 * You should have received a copy of the GNU General Public License

 * along with this program; if not, write to the Free Software

 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,

 * MA 02110-1301, USA.

 */



#ifndef __ASM_ARCH_BOARD_PBA8_H

#define __ASM_ARCH_BOARD_PBA8_H



#include "platform.h"



/*

 * Peripheral addresses

 */

#define REALVIEW_PBA8_UART0_BASE		0x10009000	/* UART 0 */

#define REALVIEW_PBA8_UART1_BASE		0x1000A000	/* UART 1 */

#define REALVIEW_PBA8_UART2_BASE		0x1000B000	/* UART 2 */

#define REALVIEW_PBA8_UART3_BASE		0x1000C000	/* UART 3 */

#define REALVIEW_PBA8_SSP_BASE			0x1000D000	/* Synchronous Serial Port */

#define REALVIEW_PBA8_WATCHDOG0_BASE		0x1000F000	/* Watchdog 0 */

#define REALVIEW_PBA8_WATCHDOG_BASE		0x10010000	/* watchdog interface */

#define REALVIEW_PBA8_TIMER0_1_BASE		0x10011000	/* Timer 0 and 1 */

#define REALVIEW_PBA8_TIMER2_3_BASE		0x10012000	/* Timer 2 and 3 */

#define REALVIEW_PBA8_GPIO0_BASE		0x10013000	/* GPIO port 0 */

#define REALVIEW_PBA8_RTC_BASE			0x10017000	/* Real Time Clock */

#define REALVIEW_PBA8_TIMER4_5_BASE		0x10018000	/* Timer 4/5 */

#define REALVIEW_PBA8_TIMER6_7_BASE		0x10019000	/* Timer 6/7 */

#define REALVIEW_PBA8_SCTL_BASE			0x1001A000	/* System Controller */

#define REALVIEW_PBA8_CLCD_BASE			0x10020000	/* CLCD */

#define REALVIEW_PBA8_ONB_SRAM_BASE		0x10060000	/* On-board SRAM */

#define REALVIEW_PBA8_DMC_BASE			0x100E0000	/* DMC configuration */

#define REALVIEW_PBA8_SMC_BASE			0x100E1000	/* SMC configuration */

#define REALVIEW_PBA8_CAN_BASE			0x100E2000	/* CAN bus */

#define REALVIEW_PBA8_GIC_CPU_BASE		0x1E000000	/* Generic interrupt controller CPU interface */

#define REALVIEW_PBA8_FLASH0_BASE		0x40000000

#define REALVIEW_PBA8_FLASH0_SIZE		SZ_64M

#define REALVIEW_PBA8_FLASH1_BASE		0x44000000

#define REALVIEW_PBA8_FLASH1_SIZE		SZ_64M

#define REALVIEW_PBA8_ETH_BASE			0x4E000000	/* Ethernet */

#define REALVIEW_PBA8_USB_BASE			0x4F000000	/* USB */

#define REALVIEW_PBA8_GIC_DIST_BASE		0x1E001000	/* Generic interrupt controller distributor */

#define REALVIEW_PBA8_LT_BASE			0xC0000000	/* Logic Tile expansion */

#define REALVIEW_PBA8_SDRAM6_BASE		0x70000000	/* SDRAM bank 6 256MB */

#define REALVIEW_PBA8_SDRAM7_BASE		0x80000000	/* SDRAM bank 7 256MB */



#define REALVIEW_PBA8_SYS_PLD_CTRL1		0x74



/*

 * PBA8 PCI regions

 */

#define REALVIEW_PBA8_PCI_BASE			0x90040000	/* PCI-X Unit base */

#define REALVIEW_PBA8_PCI_IO_BASE		0x90050000	/* IO Region on AHB */

#define REALVIEW_PBA8_PCI_MEM_BASE		0xA0000000	/* MEM Region on AHB */



#define REALVIEW_PBA8_PCI_BASE_SIZE		0x10000		/* 16 Kb */

#define REALVIEW_PBA8_PCI_IO_SIZE		0x1000		/* 4 Kb */

#define REALVIEW_PBA8_PCI_MEM_SIZE		0x20000000	/* 512 MB */



#endif	/* __ASM_ARCH_BOARD_PBA8_H */

CRA Git | Maintained and supported by SUSTech CRA and CCSE