arm64: Add DTS support for FSL's LS2085A SoC (747c84d0) · Commits · 戴 / test

arch/arm64/boot/dts/Makefile

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Original line number	Diff line number	Diff line
		@@ -3,6 +3,7 @@ dts-dirs += apm
		dts-dirs += arm
		dts-dirs += cavium
		dts-dirs += exynos
		dts-dirs += freescale

		always := $(dtb-y)
		subdir-y := $(dts-dirs)

arch/arm64/boot/dts/freescale/Makefile

0 → 100644

+5 −0

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		dtb-$(CONFIG_ARCH_FSL_LS2085A) += fsl-ls2085a-simu.dtb

		always := $(dtb-y)
		subdir-y := $(dts-dirs)
		clean-files := *.dtb

arch/arm64/boot/dts/freescale/fsl-ls2085a-simu.dts

0 → 100644

+65 −0

Original line number	Diff line number	Diff line
		/*
		* Device Tree file for Freescale LS2085a software Simulator model
		*
		* Copyright (C) 2014, Freescale Semiconductor
		*
		* Bhupesh Sharma <bhupesh.sharma@freescale.com>
		*
		* This file is dual-licensed: you can use it either under the terms
		* of the GPL or the X11 license, at your option. Note that this dual
		* licensing only applies to this file, and not this project as a
		* whole.
		*
		* a) This library is free software; you can redistribute it and/or
		* modify it under the terms of the GNU General Public License as
		* published by the Free Software Foundation; either version 2 of the
		* License, or (at your option) any later version.
		*
		* This library is distributed in the hope that it will be useful,
		* but WITHOUT ANY WARRANTY; without even the implied warranty of
		* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
		* GNU General Public License for more details.
		*
		* You should have received a copy of the GNU General Public
		* License along with this library; if not, write to the Free
		* Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
		* MA 02110-1301 USA
		*
		* Or, alternatively,
		*
		* b) Permission is hereby granted, free of charge, to any person
		* obtaining a copy of this software and associated documentation
		* files (the "Software"), to deal in the Software without
		* restriction, including without limitation the rights to use,
		* copy, modify, merge, publish, distribute, sublicense, and/or
		* sell copies of the Software, and to permit persons to whom the
		* Software is furnished to do so, subject to the following
		* conditions:
		*
		* The above copyright notice and this permission notice shall be
		* included in all copies or substantial portions of the Software.
		*
		* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
		* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
		* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
		* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
		* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
		* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
		* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
		* OTHER DEALINGS IN THE SOFTWARE.
		*/

		/dts-v1/;

		/include/ "fsl-ls2085a.dtsi"

		/ {
		model = "Freescale Layerscape 2085a software Simulator model";
		compatible = "fsl,ls2085a-simu", "fsl,ls2085a";

		ethernet@2210000 {
		compatible = "smsc,lan91c111";
		reg = <0x0 0x2210000 0x0 0x100>;
		interrupts = <0 58 0x1>;
		};
		};

arch/arm64/boot/dts/freescale/fsl-ls2085a.dtsi

0 → 100644

+163 −0

Original line number	Diff line number	Diff line
		/*
		* Device Tree Include file for Freescale Layerscape-2085A family SoC.
		*
		* Copyright (C) 2014, Freescale Semiconductor
		*
		* Bhupesh Sharma <bhupesh.sharma@freescale.com>
		*
		* This file is dual-licensed: you can use it either under the terms
		* of the GPLv2 or the X11 license, at your option. Note that this dual
		* licensing only applies to this file, and not this project as a
		* whole.
		*
		* a) This library is free software; you can redistribute it and/or
		* modify it under the terms of the GNU General Public License as
		* published by the Free Software Foundation; either version 2 of the
		* License, or (at your option) any later version.
		*
		* This library is distributed in the hope that it will be useful,
		* but WITHOUT ANY WARRANTY; without even the implied warranty of
		* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
		* GNU General Public License for more details.
		*
		* You should have received a copy of the GNU General Public
		* License along with this library; if not, write to the Free
		* Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
		* MA 02110-1301 USA
		*
		* Or, alternatively,
		*
		* b) Permission is hereby granted, free of charge, to any person
		* obtaining a copy of this software and associated documentation
		* files (the "Software"), to deal in the Software without
		* restriction, including without limitation the rights to use,
		* copy, modify, merge, publish, distribute, sublicense, and/or
		* sell copies of the Software, and to permit persons to whom the
		* Software is furnished to do so, subject to the following
		* conditions:
		*
		* The above copyright notice and this permission notice shall be
		* included in all copies or substantial portions of the Software.
		*
		* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
		* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
		* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
		* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
		* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
		* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
		* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
		* OTHER DEALINGS IN THE SOFTWARE.
		*/

		/ {
		compatible = "fsl,ls2085a";
		interrupt-parent = <&gic>;
		#address-cells = <2>;
		#size-cells = <2>;

		cpus {
		#address-cells = <2>;
		#size-cells = <0>;

		/*
		* We expect the enable-method for cpu's to be "psci", but this
		* is dependent on the SoC FW, which will fill this in.
		*
		* Currently supported enable-method is psci v0.2
		*/

		/* We have 4 clusters having 2 Cortex-A57 cores each */
		cpu@0 {
		device_type = "cpu";
		compatible = "arm,cortex-a57";
		reg = <0x0 0x0>;
		};

		cpu@1 {
		device_type = "cpu";
		compatible = "arm,cortex-a57";
		reg = <0x0 0x1>;
		};

		cpu@100 {
		device_type = "cpu";
		compatible = "arm,cortex-a57";
		reg = <0x0 0x100>;
		};

		cpu@101 {
		device_type = "cpu";
		compatible = "arm,cortex-a57";
		reg = <0x0 0x101>;
		};

		cpu@200 {
		device_type = "cpu";
		compatible = "arm,cortex-a57";
		reg = <0x0 0x200>;
		};

		cpu@201 {
		device_type = "cpu";
		compatible = "arm,cortex-a57";
		reg = <0x0 0x201>;
		};

		cpu@300 {
		device_type = "cpu";
		compatible = "arm,cortex-a57";
		reg = <0x0 0x300>;
		};

		cpu@301 {
		device_type = "cpu";
		compatible = "arm,cortex-a57";
		reg = <0x0 0x301>;
		};
		};

		memory@80000000 {
		device_type = "memory";
		reg = <0x00000000 0x80000000 0 0x80000000>;
		/* DRAM space - 1, size : 2 GB DRAM */
		};

		gic: interrupt-controller@6000000 {
		compatible = "arm,gic-v3";
		reg = <0x0 0x06000000 0 0x10000>, /* GIC Dist */
		<0x0 0x06100000 0 0x100000>; /* GICR (RD_base + SGI_base) */
		#interrupt-cells = <3>;
		interrupt-controller;
		interrupts = <1 9 0x4>;
		};

		timer {
		compatible = "arm,armv8-timer";
		interrupts = <1 13 0x8>, /* Physical Secure PPI, active-low */
		<1 14 0x8>, /* Physical Non-Secure PPI, active-low */
		<1 11 0x8>, /* Virtual PPI, active-low */
		<1 10 0x8>; /* Hypervisor PPI, active-low */
		};

		serial0: serial@21c0500 {
		device_type = "serial";
		compatible = "fsl,ns16550", "ns16550a";
		reg = <0x0 0x21c0500 0x0 0x100>;
		clock-frequency = <0>; /* Updated by bootloader */
		interrupts = <0 32 0x1>; /* edge triggered */
		};

		serial1: serial@21c0600 {
		device_type = "serial";
		compatible = "fsl,ns16550", "ns16550a";
		reg = <0x0 0x21c0600 0x0 0x100>;
		clock-frequency = <0>; /* Updated by bootloader */
		interrupts = <0 32 0x1>; /* edge triggered */
		};

		fsl_mc: fsl-mc@80c000000 {
		compatible = "fsl,qoriq-mc";
		reg = <0x00000008 0x0c000000 0 0x40>, /* MC portal base */
		<0x00000000 0x08340000 0 0x40000>; /* MC control reg */
		};
		};

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