Commit 74685b08 authored Dec 06, 2016 by Alex Committed by David S. Miller Dec 07, 2016

drivers: net: cpsw-phy-sel: Clear RGMII_IDMODE on "rgmii" links

Support for setting the RGMII_IDMODE bit was added in the commit
referenced below. However, that commit did not add the symmetrical
clearing of the bit by way of setting it in "mask". Add it here.

Note that the documentation marks clearing this bit as "reserved",
however, according to TI, support for delaying the clock does exist in
the MAC, although it is not officially supported.
We tested this on a board with an RGMII to RGMII link that will not
work unless this bit is cleared.

Fixes: 0fb26c30 ("drivers: net: cpsw-phy-sel: add support to configure rgmii internal delay")
Signed-off-by: Alexandru Gagniuc <alex.g@adaptrum.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

parent 233900d8

drivers/net/ethernet/ti/cpsw-phy-sel.c

+1 −0

Original line number	Diff line number	Diff line
		@@ -81,6 +81,7 @@ static void cpsw_gmii_sel_am3352(struct cpsw_phy_sel_priv *priv,
		};

		mask = GMII_SEL_MODE_MASK << (slave * 2) \| BIT(slave + 6);
		mask \|= BIT(slave + 4);
		mode <<= slave * 2;

		if (priv->rmii_clock_external) {

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