Commit 746647c7 authored by James Morse's avatar James Morse Committed by Will Deacon
Browse files

arm64: entry.S convert el0_sync 



el0_sync also unmasks exceptions on a case-by-case basis, debug exceptions
are enabled, unless this was a debug exception. Irqs are unmasked for
some exception types but not for others.

el0_dbg should run with everything masked to prevent us taking a debug
exception from do_debug_exception. For the other cases we can unmask
everything. This changes the behaviour of fpsimd_{acc,exc} and el0_inv
which previously ran with irqs masked.

This patch removed the last user of enable_dbg_and_irq, remove it.

Signed-off-by: default avatarJames Morse <james.morse@arm.com>
Reviewed-by: default avatarJulien Thierry <julien.thierry@arm.com>
Reviewed-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
parent b55a5a1b

arch/arm64/include/asm/assembler.h

+0 −9
Original line number Diff line number Diff line
@@ -97,15 +97,6 @@ 
9990:

	.endm



/*

 * Enable both debug exceptions and interrupts. This is likely to be

 * faster than two daifclr operations, since writes to this register

 * are self-synchronising.

 */

	.macro	enable_dbg_and_irq

	msr	daifclr, #(8 | 2)

	.endm



/*

 * SMP data memory barrier

 */

arch/arm64/kernel/entry.S

+10 −14
Original line number Diff line number Diff line
@@ -670,8 +670,7 @@ el0_da: 
	 * Data abort handling

	 */

	mrs	x26, far_el1

	// enable interrupts before calling the main handler

	enable_dbg_and_irq

	enable_daif

	ct_user_exit

	clear_address_tag x0, x26

	mov	x1, x25
@@ -683,8 +682,7 @@ el0_ia: 
	 * Instruction abort handling

	 */

	mrs	x26, far_el1

	// enable interrupts before calling the main handler

	enable_dbg_and_irq

	enable_daif

	ct_user_exit

	mov	x0, x26

	mov	x1, x25
@@ -695,7 +693,7 @@ el0_fpsimd_acc: 
	/*

	 * Floating Point or Advanced SIMD access

	 */

	enable_dbg

	enable_daif

	ct_user_exit

	mov	x0, x25

	mov	x1, sp
@@ -705,7 +703,7 @@ el0_fpsimd_exc: 
	/*

	 * Floating Point or Advanced SIMD exception

	 */

	enable_dbg

	enable_daif

	ct_user_exit

	mov	x0, x25

	mov	x1, sp
@@ -716,8 +714,7 @@ el0_sp_pc: 
	 * Stack or PC alignment exception handling

	 */

	mrs	x26, far_el1

	// enable interrupts before calling the main handler

	enable_dbg_and_irq

	enable_daif

	ct_user_exit

	mov	x0, x26

	mov	x1, x25
@@ -728,8 +725,7 @@ el0_undef: 
	/*

	 * Undefined instruction

	 */

	// enable interrupts before calling the main handler

	enable_dbg_and_irq

	enable_daif

	ct_user_exit

	mov	x0, sp

	bl	do_undefinstr
@@ -738,7 +734,7 @@ el0_sys: 
	/*

	 * System instructions, for trapped cache maintenance instructions

	 */

	enable_dbg_and_irq

	enable_daif

	ct_user_exit

	mov	x0, x25

	mov	x1, sp
@@ -753,11 +749,11 @@ el0_dbg: 
	mov	x1, x25

	mov	x2, sp

	bl	do_debug_exception

	enable_dbg

	enable_daif

	ct_user_exit

	b	ret_to_user

el0_inv:

	enable_dbg

	enable_daif

	ct_user_exit

	mov	x0, sp

	mov	x1, #BAD_SYNC
@@ -836,7 +832,7 @@ el0_svc: 
	mov	wsc_nr, #__NR_syscalls

el0_svc_naked:					// compat entry point

	stp	x0, xscno, [sp, #S_ORIG_X0]	// save the original x0 and syscall number

	enable_dbg_and_irq

	enable_daif

	ct_user_exit 1



	ldr	x16, [tsk, #TSK_TI_FLAGS]	// check for syscall hooks

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