drm/amdgpu: add BACO interfaces in pm and hwmgr function table (7451ca88) · Commits · 戴 / test

drivers/gpu/drm/amd/include/kgd_pp_interface.h

+3 −0

Original line number	Diff line number	Diff line
		@@ -281,6 +281,9 @@ struct amd_pm_funcs {
		int (set_hard_min_dcefclk_by_freq)(void handle, uint32_t clock);
		int (set_hard_min_fclk_by_freq)(void handle, uint32_t clock);
		int (set_min_deep_sleep_dcefclk)(void handle, uint32_t clock);
		int (get_asic_baco_capability)(void handle, bool *cap);
		int (get_asic_baco_state)(void handle, int *state);
		int (set_asic_baco_state)(void handle, int state);
		};

		#endif

+8 −0

Original line number	Diff line number	Diff line
		@@ -47,6 +47,11 @@ enum DISPLAY_GAP {
		};
		typedef enum DISPLAY_GAP DISPLAY_GAP;

		enum BACO_STATE {
		BACO_STATE_OUT = 0,
		BACO_STATE_IN,
		};

		struct vi_dpm_level {
		bool enabled;
		uint32_t value;
		@@ -333,6 +338,9 @@ struct pp_hwmgr_func {
		int (enable_mgpu_fan_boost)(struct pp_hwmgr hwmgr);
		int (set_hard_min_dcefclk_by_freq)(struct pp_hwmgr hwmgr, uint32_t clock);
		int (set_hard_min_fclk_by_freq)(struct pp_hwmgr hwmgr, uint32_t clock);
		int (get_asic_baco_capability)(struct pp_hwmgr hwmgr, bool *cap);
		int (get_asic_baco_state)(struct pp_hwmgr hwmgr, enum BACO_STATE *state);
		int (set_asic_baco_state)(struct pp_hwmgr hwmgr, enum BACO_STATE state);
		};

		struct pp_table_func {