Commit 742379c0 authored by Chris Wilson's avatar Chris Wilson
Browse files

drm/i915: Start chopping up the GPU error capture 



In the near future, we will want to start a GPU error capture from a new
context, from inside the softirq region of a forced preemption. To do
so requires us to break up the monolithic error capture to provide new
entry points with finer control; in particular focusing on one
engine/gt, and being able to compose an error state from little pieces
of HW capture.

Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Cc: Andi Shyti <andi.shyti@intel.com>
Acked-by: default avatarAndi Shyti <andi.shyti@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200110123059.1348712-1-chris@chris-wilson.co.uk
parent 8ccfc20a

drivers/gpu/drm/i915/gt/intel_engine.h

+1 −1
Original line number Diff line number Diff line
@@ -202,7 +202,7 @@ void intel_engine_set_hwsp_writemask(struct intel_engine_cs *engine, u32 mask); 
u64 intel_engine_get_active_head(const struct intel_engine_cs *engine);

u64 intel_engine_get_last_batch_head(const struct intel_engine_cs *engine);



void intel_engine_get_instdone(struct intel_engine_cs *engine,

void intel_engine_get_instdone(const struct intel_engine_cs *engine,

			       struct intel_instdone *instdone);



void intel_engine_init_execlists(struct intel_engine_cs *engine);

drivers/gpu/drm/i915/gt/intel_engine_cs.c

+3 −3
Original line number Diff line number Diff line
@@ -914,8 +914,8 @@ const char *i915_cache_level_str(struct drm_i915_private *i915, int type) 
}



static u32

read_subslice_reg(struct intel_engine_cs *engine, int slice, int subslice,

		  i915_reg_t reg)

read_subslice_reg(const struct intel_engine_cs *engine,

		  int slice, int subslice, i915_reg_t reg)

{

	struct drm_i915_private *i915 = engine->i915;

	struct intel_uncore *uncore = engine->uncore;
@@ -959,7 +959,7 @@ read_subslice_reg(struct intel_engine_cs *engine, int slice, int subslice, 
}



/* NB: please notice the memset */

void intel_engine_get_instdone(struct intel_engine_cs *engine,

void intel_engine_get_instdone(const struct intel_engine_cs *engine,

			       struct intel_instdone *instdone)

{

	struct drm_i915_private *i915 = engine->i915;

drivers/gpu/drm/i915/gt/intel_ggtt.c

+3 −0
Original line number Diff line number Diff line
@@ -495,6 +495,7 @@ static void cleanup_init_ggtt(struct i915_ggtt *ggtt) 
	ggtt_release_guc_top(ggtt);

	if (drm_mm_node_allocated(&ggtt->error_capture))

		drm_mm_remove_node(&ggtt->error_capture);

	mutex_destroy(&ggtt->error_mutex);

}



static int init_ggtt(struct i915_ggtt *ggtt)
@@ -526,6 +527,7 @@ static int init_ggtt(struct i915_ggtt *ggtt) 
	if (ret)

		return ret;



	mutex_init(&ggtt->error_mutex);

	if (ggtt->mappable_end) {

		/* Reserve a mappable slot for our lockless error capture */

		ret = drm_mm_insert_node_in_range(&ggtt->vm.mm,
@@ -716,6 +718,7 @@ static void ggtt_cleanup_hw(struct i915_ggtt *ggtt) 


	if (drm_mm_node_allocated(&ggtt->error_capture))

		drm_mm_remove_node(&ggtt->error_capture);

	mutex_destroy(&ggtt->error_mutex);



	ggtt_release_guc_top(ggtt);

	intel_vgt_deballoon(ggtt);

drivers/gpu/drm/i915/gt/intel_gtt.h

+1 −0
Original line number Diff line number Diff line
@@ -345,6 +345,7 @@ struct i915_ggtt { 
	/* Manual runtime pm autosuspend delay for user GGTT mmaps */

	struct intel_wakeref_auto userfault_wakeref;



	struct mutex error_mutex;

	struct drm_mm_node error_capture;

	struct drm_mm_node uc_fw;

};

drivers/gpu/drm/i915/gt/intel_reset.c

+1 −1
Original line number Diff line number Diff line
@@ -1230,7 +1230,7 @@ void intel_gt_handle_error(struct intel_gt *gt, 
	engine_mask &= INTEL_INFO(gt->i915)->engine_mask;



	if (flags & I915_ERROR_CAPTURE) {

		i915_capture_error_state(gt->i915, engine_mask, msg);

		i915_capture_error_state(gt->i915);

		intel_gt_clear_error_registers(gt, engine_mask);

	}

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