Commit 7423734e authored by Jamie Iles's avatar Jamie Iles Committed by Grant Likely
Browse files

tty: of_serial: support for 32 bit accesses 



Some platforms e.g. TI Davinci require 32-bit accesses to the UARTs.
The of_serial driver currently registers all UARTs as UPIO_MEM.  Add a
new attribute "reg-io-width" to allow the port to be registered with
different IO width requirements.

Acked-by: default avatarAlan Cox <alan@linux.intel.com>
Signed-off-by: default avatarJamie Iles <jamie@jamieiles.com>
Signed-off-by: default avatarGrant Likely <grant.likely@secretlab.ca>
parent 61ab1a90

Documentation/devicetree/bindings/tty/serial/of-serial.txt

+3 −0
Original line number Diff line number Diff line
@@ -19,6 +19,9 @@ Optional properties: 
- current-speed : the current active speed of the UART.

- reg-offset : offset to apply to the mapbase from the start of the registers.

- reg-shift : quantity to shift the register offsets by.

- reg-io-width : the size (in bytes) of the IO accesses that should be

  performed on the device.  There are some systems that require 32-bit

  accesses to the UART (e.g. TI davinci).

- used-by-rtas : set to indicate that the port is in use by the OpenFirmware

  RTAS and should not be registered.

drivers/tty/serial/of_serial.c

+17 −0
Original line number Diff line number Diff line
@@ -65,6 +65,23 @@ static int __devinit of_platform_serial_setup(struct platform_device *ofdev, 


	port->irq = irq_of_parse_and_map(np, 0);

	port->iotype = UPIO_MEM;

	prop = of_get_property(np, "reg-io-width", &prop_size);

	if (prop && (prop_size == sizeof(u32))) {

		switch (be32_to_cpup(prop)) {

		case 1:

			port->iotype = UPIO_MEM;

			break;

		case 4:

			port->iotype = UPIO_MEM32;

			break;

		default:

			dev_warn(&ofdev->dev,

				 "unsupported io width (%d bytes)\n",

				 be32_to_cpup(prop));

			return -EINVAL;

		}

	}



	port->type = type;

	port->uartclk = be32_to_cpup(clk);

	port->flags = UPF_SHARE_IRQ | UPF_BOOT_AUTOCONF | UPF_IOREMAP

CRA Git | Maintained and supported by SUSTech CRA and CCSE