Commit 73908acb authored by Chen Jun's avatar Chen Jun Committed by Stephen Boyd
Browse files

clk: hi3660: fix wrong parent name of clk_mux_sysbus 



Parent name of clk_mux_sysbus is not correct. This patch fixes it.

Signed-off-by: default avatarChen Jun <chenjun14@huawei.com>
Signed-off-by: default avatarJohn Stultz <john.stultz@linaro.org>
Signed-off-by: default avatarGuodong Xu <guodong.xu@linaro.org>
Acked-by: default avatarZhangfei Gao <zhangfei.gao@linaro.org>
Signed-off-by: default avatarStephen Boyd <sboyd@codeaurora.org>
parent a94fafb7

drivers/clk/hisilicon/clk-hi3660.c

+4 −2
Original line number Diff line number Diff line
@@ -205,6 +205,8 @@ static const struct hisi_gate_clock hi3660_crgctrl_gate_clks[] = { 
	  "clk_gate_ufs_tcxo_en", CLK_SET_RATE_PARENT, 0x420, 14, 0, },

};



static const char *const

clk_mux_sysbus_p[] = {"clk_ppll1", "clk_ppll0"};

static const char *const

clk_mux_sdio_sys_p[] = {"clk_factor_mmc", "clk_div_sdio",};

static const char *const
@@ -239,8 +241,8 @@ static const char *const 
clk_mux_i2c_p[] = {"clkin_sys", "clk_div_i2c",};



static const struct hisi_mux_clock hi3660_crgctrl_mux_clks[] = {

	{ HI3660_CLK_MUX_SYSBUS, "clk_mux_sysbus", clk_mux_sdio_sys_p,

	  ARRAY_SIZE(clk_mux_sdio_sys_p), CLK_SET_RATE_PARENT, 0xac, 0, 1,

	{ HI3660_CLK_MUX_SYSBUS, "clk_mux_sysbus", clk_mux_sysbus_p,

	  ARRAY_SIZE(clk_mux_sysbus_p), CLK_SET_RATE_PARENT, 0xac, 0, 1,

	  CLK_MUX_HIWORD_MASK, },

	{ HI3660_CLK_MUX_UART0, "clk_mux_uart0", clk_mux_uart0_p,

	  ARRAY_SIZE(clk_mux_uart0_p), CLK_SET_RATE_PARENT, 0xac, 2, 1,

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