Commit 7383092c authored by Greg Kroah-Hartman's avatar Greg Kroah-Hartman
Browse files

Merge tag 'phy-for-5.5' of... 

Merge tag 'phy-for-5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/kishon/linux-phy

 into char-misc-next

Kishon writes:

phy: for 5.5

  *) Add a new PHY driver for USB3 PHY on Allwinner H6 SoC
  *) Add a new PHY driver for Innosilicon Video Combo PHY(MIPI/LVDS/TTL)
  *) Add support in xusb-tegra210 PHY driver to get USB device mode functional
     in Tegra 210
  *) Add support for SM8150 QMP UFS PHY in phy-qcom-qmp PHY driver
  *) Fix smatch warning (array off by one) in phy-rcar-gen2 PHY driver
  *) Enable mac tx internal delay for rgmii-rxid in phy-gmii-sel driver
  *) Fix phy-qcom-usb-hs from registering multiple extcon notifiers during PHY
     power cycle
  *) Use devm_platform_ioremap_resource() in phy-mvebu-a3700-utmi,
     phy-hisi-inno-usb2, phy-histb-combphy and regulator_bulk_set_supply_names()
     in xusb to simplify code
  *) Remove unused variable in xusb-tegra210 and phy-dm816x-usb
  *) Fix sparse warnings in phy-brcm-usb-init

Signed-off-by: default avatarKishon Vijay Abraham I <kishon@ti.com>

* tag 'phy-for-5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/kishon/linux-phy: (28 commits)
  phy: phy-rockchip-inno-usb2: add phy description for px30
  phy: qcom-usb-hs: Fix extcon double register after power cycle
  phy: renesas: phy-rcar-gen2: Fix the array off by one warning
  phy: lantiq: vrx200-pcie: fix error return code in ltq_vrx200_pcie_phy_power_on()
  dt-bindings: phy: add yaml binding for rockchip,px30-dsi-dphy
  phy/rockchip: Add support for Innosilicon MIPI/LVDS/TTL PHY
  phy: add PHY_MODE_LVDS
  phy: allwinner: add phy driver for USB3 PHY on Allwinner H6 SoC
  dt-bindings: Add bindings for USB3 phy on Allwinner H6
  phy: qcom-qmp: Add SM8150 QMP UFS PHY support
  dt-bindings: phy-qcom-qmp: Add sm8150 UFS phy compatible string
  phy: ti: gmii-sel: fix mac tx internal delay for rgmii-rxid
  phy: tegra: use regulator_bulk_set_supply_names()
  phy: ti: dm816x: remove set but not used variable 'phy_data'
  phy: renesas: rcar-gen3-usb2: Fix sysfs interface of "role"
  phy: tegra: xusb: Add vbus override support on Tegra186
  phy: tegra: xusb: Add vbus override support on Tegra210
  phy: tegra: xusb: Add usb3 port fake support on Tegra210
  phy: tegra: xusb: Add XUSB dual mode support on Tegra210
  dt-bindings: rcar-gen3-phy-usb3: Add r8a774b1 support
  ...
parents 755864fe 4569e64a

Documentation/devicetree/bindings/phy/allwinner,sun50i-h6-usb3-phy.yaml

0 → 100644
+47 −0
Original line number Diff line number Diff line 
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)

# Copyright 2019 Ondrej Jirman <megous@megous.com>

%YAML 1.2

---

$id: "http://devicetree.org/schemas/phy/allwinner,sun50i-h6-usb3-phy.yaml#"

$schema: "http://devicetree.org/meta-schemas/core.yaml#"



title: Allwinner H6 USB3 PHY



maintainers:

  - Ondrej Jirman <megous@megous.com>



properties:

  compatible:

    enum:

      - allwinner,sun50i-h6-usb3-phy



  reg:

    maxItems: 1



  clocks:

    maxItems: 1



  resets:

    maxItems: 1



  "#phy-cells":

    const: 0



required:

  - compatible

  - reg

  - clocks

  - resets

  - "#phy-cells"



examples:

  - |

    #include <dt-bindings/clock/sun50i-h6-ccu.h>

    #include <dt-bindings/reset/sun50i-h6-ccu.h>

    phy@5210000 {

          compatible = "allwinner,sun50i-h6-usb3-phy";

          reg = <0x5210000 0x10000>;

          clocks = <&ccu CLK_USB_PHY1>;

          resets = <&ccu RST_USB_PHY1>;

          #phy-cells = <0>;

    };

Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.txt

+1 −0
Original line number Diff line number Diff line
@@ -2,6 +2,7 @@ ROCKCHIP USB2.0 PHY WITH INNO IP BLOCK 


Required properties (phy (parent) node):

 - compatible : should be one of the listed compatibles:

	* "rockchip,px30-usb2phy"

	* "rockchip,rk3228-usb2phy"

	* "rockchip,rk3328-usb2phy"

	* "rockchip,rk3366-usb2phy"

Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt

+6 −1
Original line number Diff line number Diff line
@@ -14,7 +14,8 @@ Required properties: 
	       "qcom,msm8998-qmp-pcie-phy" for PCIe QMP phy on msm8998,

	       "qcom,sdm845-qmp-usb3-phy" for USB3 QMP V3 phy on sdm845,

	       "qcom,sdm845-qmp-usb3-uni-phy" for USB3 QMP V3 UNI phy on sdm845,

	       "qcom,sdm845-qmp-ufs-phy" for UFS QMP phy on sdm845.

	       "qcom,sdm845-qmp-ufs-phy" for UFS QMP phy on sdm845,

	       "qcom,sm8150-qmp-ufs-phy" for UFS QMP phy on sm8150.



- reg:

  - index 0: address and length of register set for PHY's common
@@ -57,6 +58,8 @@ Required properties: 
			"aux", "cfg_ahb", "ref", "com_aux".

		For "qcom,sdm845-qmp-ufs-phy" must contain:

			"ref", "ref_aux".

		For "qcom,sm8150-qmp-ufs-phy" must contain:

			"ref", "ref_aux".



 - resets: a list of phandles and reset controller specifier pairs,

	   one for each entry in reset-names.
@@ -83,6 +86,8 @@ Required properties: 
			"phy", "common".

		For "qcom,sdm845-qmp-ufs-phy": must contain:

			"ufsphy".

		For "qcom,sm8150-qmp-ufs-phy": must contain:

			"ufsphy".



 - vdda-phy-supply: Phandle to a regulator supply to PHY core block.

 - vdda-pll-supply: Phandle to 1.8V regulator supply to PHY refclk pll block.

Documentation/devicetree/bindings/phy/rcar-gen3-phy-usb2.txt

+2 −0
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@@ -10,6 +10,8 @@ Required properties: 
	      SoC.

	      "renesas,usb2-phy-r8a774a1" if the device is a part of an R8A774A1

	      SoC.

	      "renesas,usb2-phy-r8a774b1" if the device is a part of an R8A774B1

	      SoC.

	      "renesas,usb2-phy-r8a774c0" if the device is a part of an R8A774C0

	      SoC.

	      "renesas,usb2-phy-r8a7795" if the device is a part of an R8A7795

Documentation/devicetree/bindings/phy/rcar-gen3-phy-usb3.txt

+2 −0
Original line number Diff line number Diff line
@@ -8,6 +8,8 @@ need this driver. 


Required properties:

- compatible: "renesas,r8a774a1-usb3-phy" if the device is a part of an R8A774A1

	      SoC.

	      "renesas,r8a774b1-usb3-phy" if the device is a part of an R8A774B1

	      SoC.

	      "renesas,r8a7795-usb3-phy" if the device is a part of an R8A7795

	      SoC.

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