Commit 7361bdb2 authored by Imre Deak's avatar Imre Deak
Browse files

drm/i915: Add support for non-power-of-2 FB plane alignment 



At least one framebuffer plane on TGL - the UV plane of YUV semiplanar
FBs - requires a non-power-of-2 alignment, so add support for this. This
new alignment restriction applies only to an offset within an FB, so the
GEM buffer itself containing the FB must still be power-of-2 aligned.
Add a check for this (in practice plane 0, since the plane 0 offset must
be 0).

v2:
- Fix WARN check for alignment=0.
v3:
- Return error for alignment programming bugs. (Chris)

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: default avatarImre Deak <imre.deak@intel.com>
Reviewed-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20191231233756.18753-2-imre.deak@intel.com
parent 1ee48a61

drivers/gpu/drm/i915/display/intel_display.c

+16 −8
Original line number Diff line number Diff line
@@ -2194,6 +2194,8 @@ intel_pin_and_fence_fb_obj(struct drm_framebuffer *fb, 
		return ERR_PTR(-EINVAL);















	alignment = intel_surf_alignment(fb, 0);













	if (WARN_ON(alignment && !is_power_of_2(alignment)))













		return ERR_PTR(-EINVAL);





























	/* Note that the w/a also requires 64 PTE of padding following the















	 * bo. We currently fill all unused PTE with the shadow page and so










@@ -2432,9 +2434,6 @@ static u32 intel_compute_aligned_offset(struct drm_i915_private *dev_priv,













	unsigned int cpp = fb->format->cpp[color_plane];















	u32 offset, offset_aligned;



























	if (alignment)













		alignment--;



























	if (!is_surface_linear(fb, color_plane)) {















		unsigned int tile_size, tile_width, tile_height;















		unsigned int tile_rows, tiles, pitch_tiles;









@@ -2456,17 +2455,24 @@ static u32 intel_compute_aligned_offset(struct drm_i915_private *dev_priv,













		*x %= tile_width;





























		offset = (tile_rows * pitch_tiles + tiles) * tile_size;













		offset_aligned = offset & ~alignment;

























		offset_aligned = offset;













		if (alignment)













			offset_aligned = rounddown(offset_aligned, alignment);





























		intel_adjust_tile_offset(x, y, tile_width, tile_height,















					 tile_size, pitch_tiles,















					 offset, offset_aligned);















	} else {















		offset = *y * pitch + *x * cpp;













		offset_aligned = offset & ~alignment;

























		*y = (offset & alignment) / pitch;













		*x = ((offset & alignment) - *y * pitch) / cpp;













		offset_aligned = offset;













		if (alignment) {













			offset_aligned = rounddown(offset_aligned, alignment);













			*y = (offset % alignment) / pitch;













			*x = ((offset % alignment) - *y * pitch) / cpp;













		} else {













			*y = *x = 0;













		}















	}





























	return offset_aligned;










@@ -3738,6 +3744,8 @@ static int skl_check_main_surface(struct intel_plane_state *plane_state)













	intel_add_fb_offsets(&x, &y, plane_state, 0);















	offset = intel_plane_compute_aligned_offset(&x, &y, plane_state, 0);















	alignment = intel_surf_alignment(fb, 0);













	if (WARN_ON(alignment && !is_power_of_2(alignment)))













		return -EINVAL;





























	/*















	 * AUX surface offset is specified as the distance from the



































































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