Merge tag 'common-clk-api' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

		The Common Clk Framework

		Mike Turquette <mturquette@ti.com>

This document endeavours to explain the common clk framework details,

and how to port a platform over to this framework.  It is not yet a

detailed explanation of the clock api in include/linux/clk.h, but

perhaps someday it will include that information.

	Part 1 - introduction and interface split

The common clk framework is an interface to control the clock nodes

available on various devices today.  This may come in the form of clock

gating, rate adjustment, muxing or other operations.  This framework is

enabled with the CONFIG_COMMON_CLK option.

The interface itself is divided into two halves, each shielded from the

details of its counterpart.  First is the common definition of struct

clk which unifies the framework-level accounting and infrastructure that

has traditionally been duplicated across a variety of platforms.  Second

is a common implementation of the clk.h api, defined in

drivers/clk/clk.c.  Finally there is struct clk_ops, whose operations

are invoked by the clk api implementation.

The second half of the interface is comprised of the hardware-specific

callbacks registered with struct clk_ops and the corresponding

hardware-specific structures needed to model a particular clock.  For

the remainder of this document any reference to a callback in struct

clk_ops, such as .enable or .set_rate, implies the hardware-specific

implementation of that code.  Likewise, references to struct clk_foo

serve as a convenient shorthand for the implementation of the

hardware-specific bits for the hypothetical "foo" hardware.

Tying the two halves of this interface together is struct clk_hw, which

is defined in struct clk_foo and pointed to within struct clk.  This

allows easy for navigation between the two discrete halves of the common

clock interface.

	Part 2 - common data structures and api

Below is the common struct clk definition from

include/linux/clk-private.h, modified for brevity:

	struct clk {

		const char		*name;

		const struct clk_ops	*ops;

		struct clk_hw		*hw;

		char			**parent_names;

		struct clk		**parents;

		struct clk		*parent;

		struct hlist_head	children;

		struct hlist_node	child_node;

		...

	};

The members above make up the core of the clk tree topology.  The clk

api itself defines several driver-facing functions which operate on

struct clk.  That api is documented in include/linux/clk.h.

Platforms and devices utilizing the common struct clk use the struct

clk_ops pointer in struct clk to perform the hardware-specific parts of

the operations defined in clk.h:

	struct clk_ops {

		int		(*prepare)(struct clk_hw *hw);

		void		(*unprepare)(struct clk_hw *hw);

		int		(*enable)(struct clk_hw *hw);

		void		(*disable)(struct clk_hw *hw);

		int		(*is_enabled)(struct clk_hw *hw);

		unsigned long	(*recalc_rate)(struct clk_hw *hw,

						unsigned long parent_rate);

		long		(*round_rate)(struct clk_hw *hw, unsigned long,

						unsigned long *);

		int		(*set_parent)(struct clk_hw *hw, u8 index);

		u8		(*get_parent)(struct clk_hw *hw);

		int		(*set_rate)(struct clk_hw *hw, unsigned long);

		void		(*init)(struct clk_hw *hw);

	};

	Part 3 - hardware clk implementations

The strength of the common struct clk comes from its .ops and .hw pointers

which abstract the details of struct clk from the hardware-specific bits, and

vice versa.  To illustrate consider the simple gateable clk implementation in

drivers/clk/clk-gate.c:

struct clk_gate {

	struct clk_hw	hw;

	void __iomem    *reg;

	u8              bit_idx;

	...

};

struct clk_gate contains struct clk_hw hw as well as hardware-specific

knowledge about which register and bit controls this clk's gating.

Nothing about clock topology or accounting, such as enable_count or

notifier_count, is needed here.  That is all handled by the common

framework code and struct clk.

Let's walk through enabling this clk from driver code:

	struct clk *clk;

	clk = clk_get(NULL, "my_gateable_clk");

	clk_prepare(clk);

	clk_enable(clk);

The call graph for clk_enable is very simple:

clk_enable(clk);

	clk->ops->enable(clk->hw);

	[resolves to...]

		clk_gate_enable(hw);

		[resolves struct clk gate with to_clk_gate(hw)]

			clk_gate_set_bit(gate);

And the definition of clk_gate_set_bit:

static void clk_gate_set_bit(struct clk_gate *gate)

{

	u32 reg;

	reg = __raw_readl(gate->reg);

	reg |= BIT(gate->bit_idx);

	writel(reg, gate->reg);

}

Note that to_clk_gate is defined as:

#define to_clk_gate(_hw) container_of(_hw, struct clk_gate, clk)

This pattern of abstraction is used for every clock hardware

representation.

	Part 4 - supporting your own clk hardware

When implementing support for a new type of clock it only necessary to

include the following header:

#include <linux/clk-provider.h>

include/linux/clk.h is included within that header and clk-private.h

must never be included from the code which implements the operations for

a clock.  More on that below in Part 5.

To construct a clk hardware structure for your platform you must define

the following:

struct clk_foo {

	struct clk_hw hw;

	... hardware specific data goes here ...

};

To take advantage of your data you'll need to support valid operations

for your clk:

struct clk_ops clk_foo_ops {

	.enable		= &clk_foo_enable;

	.disable	= &clk_foo_disable;

};

Implement the above functions using container_of:

#define to_clk_foo(_hw) container_of(_hw, struct clk_foo, hw)

int clk_foo_enable(struct clk_hw *hw)

{

	struct clk_foo *foo;

	foo = to_clk_foo(hw);

	... perform magic on foo ...

	return 0;

};

Below is a matrix detailing which clk_ops are mandatory based upon the

hardware capbilities of that clock.  A cell marked as "y" means

mandatory, a cell marked as "n" implies that either including that

callback is invalid or otherwise uneccesary.  Empty cells are either

optional or must be evaluated on a case-by-case basis.

                           clock hardware characteristics

	     -----------------------------------------------------------

             | gate | change rate | single parent | multiplexer | root |

             |------|-------------|---------------|-------------|------|

.prepare     |      |             |               |             |      |

.unprepare   |      |             |               |             |      |

             |      |             |               |             |      |

.enable      | y    |             |               |             |      |

.disable     | y    |             |               |             |      |

.is_enabled  | y    |             |               |             |      |

             |      |             |               |             |      |

.recalc_rate |      | y           |               |             |      |

.round_rate  |      | y           |               |             |      |

.set_rate    |      | y           |               |             |      |

             |      |             |               |             |      |

.set_parent  |      |             | n             | y           | n    |

.get_parent  |      |             | n             | y           | n    |

             |      |             |               |             |      |

.init        |      |             |               |             |      |

	     -----------------------------------------------------------

Finally, register your clock at run-time with a hardware-specific

registration function.  This function simply populates struct clk_foo's

data and then passes the common struct clk parameters to the framework

with a call to:

clk_register(...)

See the basic clock types in drivers/clk/clk-*.c for examples.

	Part 5 - static initialization of clock data

For platforms with many clocks (often numbering into the hundreds) it

may be desirable to statically initialize some clock data.  This

presents a problem since the definition of struct clk should be hidden

from everyone except for the clock core in drivers/clk/clk.c.

To get around this problem struct clk's definition is exposed in

include/linux/clk-private.h along with some macros for more easily

initializing instances of the basic clock types.  These clocks must

still be initialized with the common clock framework via a call to

__clk_init.

clk-private.h must NEVER be included by code which implements struct

clk_ops callbacks, nor must it be included by any logic which pokes

around inside of struct clk at run-time.  To do so is a layering

violation.

To better enforce this policy, always follow this simple rule: any

statically initialized clock data MUST be defined in a separate file

from the logic that implements its ops.  Basically separate the logic

from the data and all is well.

config HAVE_MACH_CLKDEV

	bool

config COMMON_CLK

	bool

	select HAVE_CLK_PREPARE

	---help---

	  The common clock framework is a single definition of struct

	  clk, useful across many platforms, as well as an

	  implementation of the clock API in include/linux/clk.h.

	  Architectures utilizing the common struct clk should select

	  this option.

menu "Common Clock Framework"

	depends on COMMON_CLK

config COMMON_CLK_DISABLE_UNUSED

	bool "Disabled unused clocks at boot"

	depends on COMMON_CLK

	---help---

	  Traverses the entire clock tree and disables any clocks that are

	  enabled in hardware but have not been enabled by any device drivers.

	  This saves power and keeps the software model of the clock in line

	  with reality.

	  If in doubt, say "N".

config COMMON_CLK_DEBUG

	bool "DebugFS representation of clock tree"

	depends on COMMON_CLK

	select DEBUG_FS

	---help---

	  Creates a directory hierchy in debugfs for visualizing the clk

	  tree structure.  Each directory contains read-only members

	  that export information specific to that clk node: clk_rate,

	  clk_flags, clk_prepare_count, clk_enable_count &

	  clk_notifier_count.

endmenu

obj-$(CONFIG_CLKDEV_LOOKUP)	+= clkdev.o

obj-$(CONFIG_COMMON_CLK)	+= clk.o clk-fixed-rate.o clk-gate.o \

				   clk-mux.o clk-divider.o

/*

 * Copyright (C) 2011 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>

 * Copyright (C) 2011 Richard Zhao, Linaro <richard.zhao@linaro.org>

 * Copyright (C) 2011-2012 Mike Turquette, Linaro Ltd <mturquette@linaro.org>

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 as

 * published by the Free Software Foundation.

 *

 * Adjustable divider clock implementation

 */

#include <linux/clk-provider.h>

#include <linux/module.h>

#include <linux/slab.h>

#include <linux/io.h>

#include <linux/err.h>

#include <linux/string.h>

/*

 * DOC: basic adjustable divider clock that cannot gate

 *

 * Traits of this clock:

 * prepare - clk_prepare only ensures that parents are prepared

 * enable - clk_enable only ensures that parents are enabled

 * rate - rate is adjustable.  clk->rate = parent->rate / divisor

 * parent - fixed parent.  No clk_set_parent support

 */

#define to_clk_divider(_hw) container_of(_hw, struct clk_divider, hw)

#define div_mask(d)	((1 << (d->width)) - 1)

static unsigned long clk_divider_recalc_rate(struct clk_hw *hw,

		unsigned long parent_rate)

{

	struct clk_divider *divider = to_clk_divider(hw);

	unsigned int div;

	div = readl(divider->reg) >> divider->shift;

	div &= div_mask(divider);

	if (!(divider->flags & CLK_DIVIDER_ONE_BASED))

		div++;

	return parent_rate / div;

}

EXPORT_SYMBOL_GPL(clk_divider_recalc_rate);

/*

 * The reverse of DIV_ROUND_UP: The maximum number which

 * divided by m is r

 */

#define MULT_ROUND_UP(r, m) ((r) * (m) + (m) - 1)

static int clk_divider_bestdiv(struct clk_hw *hw, unsigned long rate,

		unsigned long *best_parent_rate)

{

	struct clk_divider *divider = to_clk_divider(hw);

	int i, bestdiv = 0;

	unsigned long parent_rate, best = 0, now, maxdiv;

	if (!rate)

		rate = 1;

	maxdiv = (1 << divider->width);

	if (divider->flags & CLK_DIVIDER_ONE_BASED)

		maxdiv--;

	if (!best_parent_rate) {

		parent_rate = __clk_get_rate(__clk_get_parent(hw->clk));

		bestdiv = DIV_ROUND_UP(parent_rate, rate);

		bestdiv = bestdiv == 0 ? 1 : bestdiv;

		bestdiv = bestdiv > maxdiv ? maxdiv : bestdiv;

		return bestdiv;

	}

	/*

	 * The maximum divider we can use without overflowing

	 * unsigned long in rate * i below

	 */

	maxdiv = min(ULONG_MAX / rate, maxdiv);

	for (i = 1; i <= maxdiv; i++) {

		parent_rate = __clk_round_rate(__clk_get_parent(hw->clk),

				MULT_ROUND_UP(rate, i));

		now = parent_rate / i;

		if (now <= rate && now > best) {

			bestdiv = i;

			best = now;

			*best_parent_rate = parent_rate;

		}

	}

	if (!bestdiv) {

		bestdiv = (1 << divider->width);

		if (divider->flags & CLK_DIVIDER_ONE_BASED)

			bestdiv--;

		*best_parent_rate = __clk_round_rate(__clk_get_parent(hw->clk), 1);

	}

	return bestdiv;

}

static long clk_divider_round_rate(struct clk_hw *hw, unsigned long rate,

				unsigned long *prate)

{

	int div;

	div = clk_divider_bestdiv(hw, rate, prate);

	if (prate)

		return *prate / div;

	else {

		unsigned long r;

		r = __clk_get_rate(__clk_get_parent(hw->clk));

		return r / div;

	}

}

EXPORT_SYMBOL_GPL(clk_divider_round_rate);

static int clk_divider_set_rate(struct clk_hw *hw, unsigned long rate)

{

	struct clk_divider *divider = to_clk_divider(hw);

	unsigned int div;

	unsigned long flags = 0;

	u32 val;

	div = __clk_get_rate(__clk_get_parent(hw->clk)) / rate;

	if (!(divider->flags & CLK_DIVIDER_ONE_BASED))

		div--;

	if (div > div_mask(divider))

		div = div_mask(divider);

	if (divider->lock)

		spin_lock_irqsave(divider->lock, flags);

	val = readl(divider->reg);

	val &= ~(div_mask(divider) << divider->shift);

	val |= div << divider->shift;

	writel(val, divider->reg);

	if (divider->lock)

		spin_unlock_irqrestore(divider->lock, flags);

	return 0;

}

EXPORT_SYMBOL_GPL(clk_divider_set_rate);

struct clk_ops clk_divider_ops = {

	.recalc_rate = clk_divider_recalc_rate,

	.round_rate = clk_divider_round_rate,

	.set_rate = clk_divider_set_rate,

};

EXPORT_SYMBOL_GPL(clk_divider_ops);

struct clk *clk_register_divider(struct device *dev, const char *name,

		const char *parent_name, unsigned long flags,

		void __iomem *reg, u8 shift, u8 width,

		u8 clk_divider_flags, spinlock_t *lock)

{

	struct clk_divider *div;

	struct clk *clk;

	div = kzalloc(sizeof(struct clk_divider), GFP_KERNEL);

	if (!div) {

		pr_err("%s: could not allocate divider clk\n", __func__);

		return NULL;

	}

	/* struct clk_divider assignments */

	div->reg = reg;

	div->shift = shift;

	div->width = width;

	div->flags = clk_divider_flags;

	div->lock = lock;

	if (parent_name) {

		div->parent[0] = kstrdup(parent_name, GFP_KERNEL);

		if (!div->parent[0])

			goto out;

	}

	clk = clk_register(dev, name,

			&clk_divider_ops, &div->hw,

			div->parent,

			(parent_name ? 1 : 0),

			flags);

	if (clk)

		return clk;

out:

	kfree(div->parent[0]);

	kfree(div);

	return NULL;

}

/*

 * Copyright (C) 2010-2011 Canonical Ltd <jeremy.kerr@canonical.com>

 * Copyright (C) 2011-2012 Mike Turquette, Linaro Ltd <mturquette@linaro.org>

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 as

 * published by the Free Software Foundation.

 *

 * Fixed rate clock implementation

 */

#include <linux/clk-provider.h>

#include <linux/module.h>

#include <linux/slab.h>

#include <linux/io.h>

#include <linux/err.h>

/*

 * DOC: basic fixed-rate clock that cannot gate

 *

 * Traits of this clock:

 * prepare - clk_(un)prepare only ensures parents are prepared

 * enable - clk_enable only ensures parents are enabled

 * rate - rate is always a fixed value.  No clk_set_rate support

 * parent - fixed parent.  No clk_set_parent support

 */

#define to_clk_fixed_rate(_hw) container_of(_hw, struct clk_fixed_rate, hw)

static unsigned long clk_fixed_rate_recalc_rate(struct clk_hw *hw,

		unsigned long parent_rate)

{

	return to_clk_fixed_rate(hw)->fixed_rate;

}

EXPORT_SYMBOL_GPL(clk_fixed_rate_recalc_rate);

struct clk_ops clk_fixed_rate_ops = {

	.recalc_rate = clk_fixed_rate_recalc_rate,

};

EXPORT_SYMBOL_GPL(clk_fixed_rate_ops);

struct clk *clk_register_fixed_rate(struct device *dev, const char *name,

		const char *parent_name, unsigned long flags,

		unsigned long fixed_rate)

{

	struct clk_fixed_rate *fixed;

	char **parent_names = NULL;

	u8 len;

	fixed = kzalloc(sizeof(struct clk_fixed_rate), GFP_KERNEL);

	if (!fixed) {

		pr_err("%s: could not allocate fixed clk\n", __func__);

		return ERR_PTR(-ENOMEM);

	}

	/* struct clk_fixed_rate assignments */

	fixed->fixed_rate = fixed_rate;

	if (parent_name) {

		parent_names = kmalloc(sizeof(char *), GFP_KERNEL);

		if (! parent_names)

			goto out;

		len = sizeof(char) * strlen(parent_name);

		parent_names[0] = kmalloc(len, GFP_KERNEL);

		if (!parent_names[0])

			goto out;

		strncpy(parent_names[0], parent_name, len);

	}

out:

	return clk_register(dev, name,

			&clk_fixed_rate_ops, &fixed->hw,

			parent_names,

			(parent_name ? 1 : 0),

			flags);

}