Merge tag 'fixes-for-v4.9-rc2' of... (733cbe06) · Commits · 戴 / test

Documentation/devicetree/bindings/usb/dwc2.txt

+1 −4

Original line number	Diff line number	Diff line
		@@ -28,10 +28,7 @@ Refer to phy/phy-bindings.txt for generic phy consumer properties
		- g-use-dma: enable dma usage in gadget driver.
		- g-rx-fifo-size: size of rx fifo size in gadget mode.
		- g-np-tx-fifo-size: size of non-periodic tx fifo size in gadget mode.

		Deprecated properties:
		- g-tx-fifo-size: size of periodic tx fifo per endpoint (except ep0)
		in gadget mode.
		- g-tx-fifo-size: size of periodic tx fifo per endpoint (except ep0) in gadget mode.

		Example:

drivers/usb/dwc2/core.c

+10 −1

Original line number	Diff line number	Diff line
		@@ -463,9 +463,18 @@ static void dwc2_clear_force_mode(struct dwc2_hsotg *hsotg)
		*/
		void dwc2_force_dr_mode(struct dwc2_hsotg *hsotg)
		{
		bool ret;

		switch (hsotg->dr_mode) {
		case USB_DR_MODE_HOST:
		dwc2_force_mode(hsotg, true);
		ret = dwc2_force_mode(hsotg, true);
		/*
		* NOTE: This is required for some rockchip soc based
		* platforms on their host-only dwc2.
		*/
		if (!ret)
		msleep(50);

		break;
		case USB_DR_MODE_PERIPHERAL:
		dwc2_force_mode(hsotg, false);

drivers/usb/dwc2/core.h

+7 −0

Original line number	Diff line number	Diff line
		@@ -259,6 +259,13 @@ enum dwc2_lx_state {
		DWC2_L3, /* Off state */
		};

		/*
		* Gadget periodic tx fifo sizes as used by legacy driver
		* EP0 is not included
		*/
		#define DWC2_G_P_LEGACY_TX_FIFO_SIZE {256, 256, 256, 256, 768, 768, 768, \
		768, 0, 0, 0, 0, 0, 0, 0}

		/* Gadget ep0 states */
		enum dwc2_ep0_state {
		DWC2_EP0_SETUP,

drivers/usb/dwc2/gadget.c

+42 −11

Original line number	Diff line number	Diff line
		@@ -186,10 +186,9 @@ static void dwc2_hsotg_ctrl_epint(struct dwc2_hsotg *hsotg,
		*/
		static void dwc2_hsotg_init_fifo(struct dwc2_hsotg *hsotg)
		{
		unsigned int fifo;
		unsigned int ep;
		unsigned int addr;
		int timeout;
		u32 dptxfsizn;
		u32 val;

		/* Reset fifo map if not correctly cleared during previous session */
		@@ -217,16 +216,16 @@ static void dwc2_hsotg_init_fifo(struct dwc2_hsotg *hsotg)
		* them to endpoints dynamically according to maxpacket size value of
		* given endpoint.
		*/
		for (fifo = 1; fifo < MAX_EPS_CHANNELS; fifo++) {
		dptxfsizn = dwc2_readl(hsotg->regs + DPTXFSIZN(fifo));

		val = (dptxfsizn & FIFOSIZE_DEPTH_MASK) \| addr;
		addr += dptxfsizn >> FIFOSIZE_DEPTH_SHIFT;

		if (addr > hsotg->fifo_mem)
		break;
		for (ep = 1; ep < MAX_EPS_CHANNELS; ep++) {
		if (!hsotg->g_tx_fifo_sz[ep])
		continue;
		val = addr;
		val \|= hsotg->g_tx_fifo_sz[ep] << FIFOSIZE_DEPTH_SHIFT;
		WARN_ONCE(addr + hsotg->g_tx_fifo_sz[ep] > hsotg->fifo_mem,
		"insufficient fifo memory");
		addr += hsotg->g_tx_fifo_sz[ep];

		dwc2_writel(val, hsotg->regs + DPTXFSIZN(fifo));
		dwc2_writel(val, hsotg->regs + DPTXFSIZN(ep));
		}

		/*
		@@ -3807,10 +3806,36 @@ static void dwc2_hsotg_dump(struct dwc2_hsotg *hsotg)
		static void dwc2_hsotg_of_probe(struct dwc2_hsotg *hsotg)
		{
		struct device_node *np = hsotg->dev->of_node;
		u32 len = 0;
		u32 i = 0;

		/* Enable dma if requested in device tree */
		hsotg->g_using_dma = of_property_read_bool(np, "g-use-dma");

		/*
		* Register TX periodic fifo size per endpoint.
		* EP0 is excluded since it has no fifo configuration.
		*/
		if (!of_find_property(np, "g-tx-fifo-size", &len))
		goto rx_fifo;

		len /= sizeof(u32);

		/* Read tx fifo sizes other than ep0 */
		if (of_property_read_u32_array(np, "g-tx-fifo-size",
		&hsotg->g_tx_fifo_sz[1], len))
		goto rx_fifo;

		/* Add ep0 */
		len++;

		/* Make remaining TX fifos unavailable */
		if (len < MAX_EPS_CHANNELS) {
		for (i = len; i < MAX_EPS_CHANNELS; i++)
		hsotg->g_tx_fifo_sz[i] = 0;
		}

		rx_fifo:
		/* Register RX fifo size */
		of_property_read_u32(np, "g-rx-fifo-size", &hsotg->g_rx_fifo_sz);

		@@ -3832,10 +3857,13 @@ int dwc2_gadget_init(struct dwc2_hsotg *hsotg, int irq)
		struct device *dev = hsotg->dev;
		int epnum;
		int ret;
		int i;
		u32 p_tx_fifo[] = DWC2_G_P_LEGACY_TX_FIFO_SIZE;

		/* Initialize to legacy fifo configuration values */
		hsotg->g_rx_fifo_sz = 2048;
		hsotg->g_np_g_tx_fifo_sz = 1024;
		memcpy(&hsotg->g_tx_fifo_sz[1], p_tx_fifo, sizeof(p_tx_fifo));
		/* Device tree specific probe */
		dwc2_hsotg_of_probe(hsotg);

		@@ -3853,6 +3881,9 @@ int dwc2_gadget_init(struct dwc2_hsotg *hsotg, int irq)
		dev_dbg(dev, "NonPeriodic TXFIFO size: %d\n",
		hsotg->g_np_g_tx_fifo_sz);
		dev_dbg(dev, "RXFIFO size: %d\n", hsotg->g_rx_fifo_sz);
		for (i = 0; i < MAX_EPS_CHANNELS; i++)
		dev_dbg(dev, "Periodic TXFIFO%2d size: %d\n", i,
		hsotg->g_tx_fifo_sz[i]);

		hsotg->gadget.max_speed = USB_SPEED_HIGH;
		hsotg->gadget.ops = &dwc2_hsotg_gadget_ops;

drivers/usb/dwc3/gadget.c

+18 −8

Original line number	Diff line number	Diff line
		@@ -783,6 +783,7 @@ static void dwc3_prepare_one_trb(struct dwc3_ep *dep,
		req->trb = trb;
		req->trb_dma = dwc3_trb_dma_offset(dep, trb);
		req->first_trb_index = dep->trb_enqueue;
		dep->queued_requests++;
		}

		dwc3_ep_inc_enq(dep);
		@@ -833,8 +834,6 @@ static void dwc3_prepare_one_trb(struct dwc3_ep *dep,

		trb->ctrl \|= DWC3_TRB_CTRL_HWO;

		dep->queued_requests++;

		trace_dwc3_prepare_trb(dep, trb);
		}

		@@ -1074,9 +1073,17 @@ static int __dwc3_gadget_ep_queue(struct dwc3_ep dep, struct dwc3_request req)

		list_add_tail(&req->list, &dep->pending_list);

		if (usb_endpoint_xfer_isoc(dep->endpoint.desc) &&
		dep->flags & DWC3_EP_PENDING_REQUEST) {
		if (list_empty(&dep->started_list)) {
		/*
		* NOTICE: Isochronous endpoints should NEVER be prestarted. We must
		* wait for a XferNotReady event so we will know what's the current
		* (micro-)frame number.
		*
		* Without this trick, we are very, very likely gonna get Bus Expiry
		* errors which will force us issue EndTransfer command.
		*/
		if (usb_endpoint_xfer_isoc(dep->endpoint.desc)) {
		if ((dep->flags & DWC3_EP_PENDING_REQUEST) &&
		list_empty(&dep->started_list)) {
		dwc3_stop_active_transfer(dwc, dep->number, true);
		dep->flags = DWC3_EP_ENABLED;
		}
		@@ -1861,8 +1868,11 @@ static int __dwc3_cleanup_done_trbs(struct dwc3 dwc, struct dwc3_ep dep,
		unsigned int s_pkt = 0;
		unsigned int trb_status;

		dep->queued_requests--;
		dwc3_ep_inc_deq(dep);

		if (req->trb == trb)
		dep->queued_requests--;

		trace_dwc3_complete_trb(dep, trb);

		/*
		@@ -2980,7 +2990,7 @@ err3:
		kfree(dwc->setup_buf);

		err2:
		dma_free_coherent(dwc->dev, sizeof(*dwc->ep0_trb),
		dma_free_coherent(dwc->dev, sizeof(dwc->ep0_trb) 2,
		dwc->ep0_trb, dwc->ep0_trb_addr);

		err1:
		@@ -3005,7 +3015,7 @@ void dwc3_gadget_exit(struct dwc3 *dwc)
		kfree(dwc->setup_buf);
		kfree(dwc->zlp_buf);

		dma_free_coherent(dwc->dev, sizeof(*dwc->ep0_trb),
		dma_free_coherent(dwc->dev, sizeof(dwc->ep0_trb) 2,
		dwc->ep0_trb, dwc->ep0_trb_addr);

		dma_free_coherent(dwc->dev, sizeof(*dwc->ctrl_req),

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