Commit 73395a79 authored by Ido Reis's avatar Ido Reis Committed by Luciano Coelho
Browse files

wl18xx: support PG2 version of the chip



PG2 has a unique chip id. It supports similar HW quirks.

Signed-off-by: default avatarIdo Reis <idor@ti.com>
Signed-off-by: default avatarArik Nemtsov <arik@wizery.com>
Signed-off-by: default avatarLuciano Coelho <coelho@ti.com>
parent 4085f641
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+11 −1
Original line number Diff line number Diff line
@@ -588,6 +588,17 @@ static int wl18xx_identify_chip(struct wl1271 *wl)
	int ret = 0;

	switch (wl->chip.id) {
	case CHIP_ID_185x_PG20:
		wl1271_debug(DEBUG_BOOT, "chip id 0x%x (185x PG20)",
				 wl->chip.id);
		wl->sr_fw_name = WL18XX_FW_NAME;
		/* wl18xx uses the same firmware for PLT */
		wl->plt_fw_name = WL18XX_FW_NAME;
		wl->quirks |= WLCORE_QUIRK_NO_ELP |
			      WLCORE_QUIRK_FWLOG_NOT_IMPLEMENTED |
			      WLCORE_QUIRK_RX_BLOCKSIZE_ALIGN;

		break;
	case CHIP_ID_185x_PG10:
		wl1271_debug(DEBUG_BOOT, "chip id 0x%x (185x PG10)",
			     wl->chip.id);
@@ -602,7 +613,6 @@ static int wl18xx_identify_chip(struct wl1271 *wl)
		/* PG 1.0 has some problems with MCS_13, so disable it */
		wl->ht_cap[IEEE80211_BAND_2GHZ].mcs.rx_mask[1] &= ~BIT(5);

		/* TODO: need to blocksize alignment for RX/TX separately? */
		break;
	default:
		wl1271_warning("unsupported chip id: 0x%x", wl->chip.id);
+1 −0
Original line number Diff line number Diff line
@@ -140,6 +140,7 @@
#define WL18XX_FW_STATUS_ADDR		0x50F8

#define CHIP_ID_185x_PG10              (0x06030101)
#define CHIP_ID_185x_PG20              (0x06030111)

/*
 * Host Command Interrupt. Setting this bit masks