PCI: Disable MSI for HiSilicon Hip06/Hip07 Root Ports (72f2ff0d) · Commits · 戴 / test

The PCIe Root Port in Hip06/Hip07 SoCs advertises an MSI capability, but it cannot generate MSIs. It can transfer MSI/MSI-X from downstream devices, but does not support MSI/MSI-X itself. Add a quirk to prevent use of MSI/MSI-X by the Root Port. [bhelgaas: changelog, sort vendor ID #define, drop device ID #define] Signed-off-by:

Dongdong Liu <liudongdong3@huawei.com> Signed-off-by:

Bjorn Helgaas <bhelgaas@google.com> Reviewed-by:

Gabriele Paoloni <gabriele.paoloni@huawei.com> Reviewed-by:

Zhou Wang <wangzhou1@hisilicon.com>

drivers/pci/quirks.c

+1 −0

Original line number	Diff line number	Diff line
		@@ -1634,6 +1634,7 @@ static void quirk_pcie_mch(struct pci_dev *pdev)
		DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_E7520_MCH, quirk_pcie_mch);
		DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_E7320_MCH, quirk_pcie_mch);
		DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_E7525_MCH, quirk_pcie_mch);
		DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_HUAWEI, 0x1610, quirk_pcie_mch);


		/*

include/linux/pci_ids.h

+2 −0

Original line number	Diff line number	Diff line
		@@ -2516,6 +2516,8 @@
		#define PCI_DEVICE_ID_KORENIX_JETCARDF2 0x1700
		#define PCI_DEVICE_ID_KORENIX_JETCARDF3 0x17ff

		#define PCI_VENDOR_ID_HUAWEI 0x19e5

		#define PCI_VENDOR_ID_NETRONOME 0x19ee
		#define PCI_DEVICE_ID_NETRONOME_NFP3200 0x3200
		#define PCI_DEVICE_ID_NETRONOME_NFP3240 0x3240

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