Commit 72e96d64 authored by Joonas Lahtinen's avatar Joonas Lahtinen
Browse files

drm/i915: Refer to GGTT {,VM} consistently 



Refer to the GGTT VM consistently as "ggtt->base" instead of just "ggtt",
"vm" or indirectly through other variables like "dev_priv->ggtt.base"
to avoid confusion with the i915_ggtt object itself and PPGTT VMs.

Refer to the GGTT as "ggtt" instead of indirectly through chaining.

As a bonus gets rid of the long-standing i915_obj_to_ggtt vs.
i915_gem_obj_to_ggtt conflict, due to removal of i915_obj_to_ggtt!

v2:
- Added some more after grepping sources with Chris

v3:
- Refer to GGTT VM through ggtt->base consistently instead of ggtt_vm
  (Chris)

v4:
- Convert all dev_priv->ggtt->foo accesses to ggtt->foo.

v5:
- Make patch checker happy

Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: default avatarJoonas Lahtinen <joonas.lahtinen@linux.intel.com>
Reviewed-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
parent 20a34e78

drivers/gpu/drm/i915/i915_debugfs.c

+9 −10
Original line number Diff line number Diff line
@@ -202,8 +202,8 @@ static int i915_gem_object_list_info(struct seq_file *m, void *data) 
	uintptr_t list = (uintptr_t) node->info_ent->data;

	struct list_head *head;

	struct drm_device *dev = node->minor->dev;

	struct drm_i915_private *dev_priv = dev->dev_private;

	struct i915_address_space *vm = &dev_priv->ggtt.base;

	struct drm_i915_private *dev_priv = to_i915(dev);

	struct i915_ggtt *ggtt = &dev_priv->ggtt;

	struct i915_vma *vma;

	u64 total_obj_size, total_gtt_size;

	int count, ret;
@@ -216,11 +216,11 @@ static int i915_gem_object_list_info(struct seq_file *m, void *data) 
	switch (list) {

	case ACTIVE_LIST:

		seq_puts(m, "Active:\n");

		head = &vm->active_list;

		head = &ggtt->base.active_list;

		break;

	case INACTIVE_LIST:

		seq_puts(m, "Inactive:\n");

		head = &vm->inactive_list;

		head = &ggtt->base.inactive_list;

		break;

	default:

		mutex_unlock(&dev->struct_mutex);
@@ -429,11 +429,11 @@ static int i915_gem_object_info(struct seq_file *m, void* data) 
{

	struct drm_info_node *node = m->private;

	struct drm_device *dev = node->minor->dev;

	struct drm_i915_private *dev_priv = dev->dev_private;

	struct drm_i915_private *dev_priv = to_i915(dev);

	struct i915_ggtt *ggtt = &dev_priv->ggtt;

	u32 count, mappable_count, purgeable_count;

	u64 size, mappable_size, purgeable_size;

	struct drm_i915_gem_object *obj;

	struct i915_address_space *vm = &dev_priv->ggtt.base;

	struct drm_file *file;

	struct i915_vma *vma;

	int ret;
@@ -452,12 +452,12 @@ static int i915_gem_object_info(struct seq_file *m, void* data) 
		   count, mappable_count, size, mappable_size);



	size = count = mappable_size = mappable_count = 0;

	count_vmas(&vm->active_list, vm_link);

	count_vmas(&ggtt->base.active_list, vm_link);

	seq_printf(m, "  %u [%u] active objects, %llu [%llu] bytes\n",

		   count, mappable_count, size, mappable_size);



	size = count = mappable_size = mappable_count = 0;

	count_vmas(&vm->inactive_list, vm_link);

	count_vmas(&ggtt->base.inactive_list, vm_link);

	seq_printf(m, "  %u [%u] inactive objects, %llu [%llu] bytes\n",

		   count, mappable_count, size, mappable_size);
@@ -492,8 +492,7 @@ static int i915_gem_object_info(struct seq_file *m, void* data) 
		   count, size);



	seq_printf(m, "%llu [%llu] gtt total\n",

		   dev_priv->ggtt.base.total,

		   (u64)dev_priv->ggtt.mappable_end - dev_priv->ggtt.base.start);

		   ggtt->base.total, ggtt->mappable_end - ggtt->base.start);



	seq_putc(m, '\n');

	print_batch_pool_stats(m, dev_priv);

drivers/gpu/drm/i915/i915_dma.c

+12 −9
Original line number Diff line number Diff line
@@ -527,6 +527,7 @@ static int i915_kick_out_firmware_fb(struct drm_i915_private *dev_priv) 
{

	struct apertures_struct *ap;

	struct pci_dev *pdev = dev_priv->dev->pdev;

	struct i915_ggtt *ggtt = &dev_priv->ggtt;

	bool primary;

	int ret;
@@ -534,8 +535,8 @@ static int i915_kick_out_firmware_fb(struct drm_i915_private *dev_priv) 
	if (!ap)

		return -ENOMEM;



	ap->ranges[0].base = dev_priv->ggtt.mappable_base;

	ap->ranges[0].size = dev_priv->ggtt.mappable_end;

	ap->ranges[0].base = ggtt->mappable_base;

	ap->ranges[0].size = ggtt->mappable_end;



	primary =

		pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
@@ -1170,6 +1171,7 @@ static void i915_driver_cleanup_mmio(struct drm_i915_private *dev_priv) 
static int i915_driver_init_hw(struct drm_i915_private *dev_priv)

{

	struct drm_device *dev = dev_priv->dev;

	struct i915_ggtt *ggtt = &dev_priv->ggtt;

	uint32_t aperture_size;

	int ret;
@@ -1213,17 +1215,17 @@ static int i915_driver_init_hw(struct drm_i915_private *dev_priv) 
	if (IS_BROADWATER(dev) || IS_CRESTLINE(dev))

		dma_set_coherent_mask(&dev->pdev->dev, DMA_BIT_MASK(32));



	aperture_size = dev_priv->ggtt.mappable_end;

	aperture_size = ggtt->mappable_end;



	dev_priv->ggtt.mappable =

		io_mapping_create_wc(dev_priv->ggtt.mappable_base,

	ggtt->mappable =

		io_mapping_create_wc(ggtt->mappable_base,

				     aperture_size);

	if (dev_priv->ggtt.mappable == NULL) {

	if (!ggtt->mappable) {

		ret = -EIO;

		goto out_ggtt;

	}



	dev_priv->ggtt.mtrr = arch_phys_wc_add(dev_priv->ggtt.mappable_base,

	ggtt->mtrr = arch_phys_wc_add(ggtt->mappable_base,

					      aperture_size);



	pm_qos_add_request(&dev_priv->pm_qos, PM_QOS_CPU_DMA_LATENCY,
@@ -1266,13 +1268,14 @@ out_ggtt: 
static void i915_driver_cleanup_hw(struct drm_i915_private *dev_priv)

{

	struct drm_device *dev = dev_priv->dev;

	struct i915_ggtt *ggtt = &dev_priv->ggtt;



	if (dev->pdev->msi_enabled)

		pci_disable_msi(dev->pdev);



	pm_qos_remove_request(&dev_priv->pm_qos);

	arch_phys_wc_del(dev_priv->ggtt.mtrr);

	io_mapping_free(dev_priv->ggtt.mappable);

	arch_phys_wc_del(ggtt->mtrr);

	io_mapping_free(ggtt->mappable);

	i915_ggtt_cleanup_hw(dev);

}

drivers/gpu/drm/i915/i915_drv.h

+8 −5
Original line number Diff line number Diff line
@@ -3154,9 +3154,6 @@ i915_gem_obj_to_ggtt(struct drm_i915_gem_object *obj) 
bool i915_gem_obj_is_pinned(struct drm_i915_gem_object *obj);



/* Some GGTT VM helpers */

#define i915_obj_to_ggtt(obj) \

	(&((struct drm_i915_private *)(obj)->base.dev->dev_private)->ggtt.base)



static inline struct i915_hw_ppgtt *

i915_vm_to_ppgtt(struct i915_address_space *vm)

{
@@ -3173,7 +3170,10 @@ static inline bool i915_gem_obj_ggtt_bound(struct drm_i915_gem_object *obj) 
static inline unsigned long

i915_gem_obj_ggtt_size(struct drm_i915_gem_object *obj)

{

	return i915_gem_obj_size(obj, i915_obj_to_ggtt(obj));

	struct drm_i915_private *dev_priv = to_i915(obj->base.dev);

	struct i915_ggtt *ggtt = &dev_priv->ggtt;



	return i915_gem_obj_size(obj, &ggtt->base);

}



static inline int __must_check
@@ -3181,7 +3181,10 @@ i915_gem_obj_ggtt_pin(struct drm_i915_gem_object *obj, 
		      uint32_t alignment,

		      unsigned flags)

{

	return i915_gem_object_pin(obj, i915_obj_to_ggtt(obj),

	struct drm_i915_private *dev_priv = to_i915(obj->base.dev);

	struct i915_ggtt *ggtt = &dev_priv->ggtt;



	return i915_gem_object_pin(obj, &ggtt->base,

				   alignment, flags | PIN_GLOBAL);

}

drivers/gpu/drm/i915/i915_gem.c

+32 −18
Original line number Diff line number Diff line
@@ -130,9 +130,9 @@ int 
i915_gem_get_aperture_ioctl(struct drm_device *dev, void *data,

			    struct drm_file *file)

{

	struct drm_i915_private *dev_priv = dev->dev_private;

	struct drm_i915_gem_get_aperture *args = data;

	struct drm_i915_private *dev_priv = to_i915(dev);

	struct i915_ggtt *ggtt = &dev_priv->ggtt;

	struct drm_i915_gem_get_aperture *args = data;

	struct i915_vma *vma;

	size_t pinned;
@@ -146,7 +146,7 @@ i915_gem_get_aperture_ioctl(struct drm_device *dev, void *data, 
			pinned += vma->node.size;

	mutex_unlock(&dev->struct_mutex);



	args->aper_size = dev_priv->ggtt.base.total;

	args->aper_size = ggtt->base.total;

	args->aper_available_size = args->aper_size - pinned;



	return 0;
@@ -765,7 +765,8 @@ i915_gem_gtt_pwrite_fast(struct drm_device *dev, 
			 struct drm_i915_gem_pwrite *args,

			 struct drm_file *file)

{

	struct drm_i915_private *dev_priv = dev->dev_private;

	struct drm_i915_private *dev_priv = to_i915(dev);

	struct i915_ggtt *ggtt = &dev_priv->ggtt;

	ssize_t remain;

	loff_t offset, page_base;

	char __user *user_data;
@@ -807,7 +808,7 @@ i915_gem_gtt_pwrite_fast(struct drm_device *dev, 
		 * source page isn't available.  Return the error and we'll

		 * retry in the slow path.

		 */

		if (fast_user_write(dev_priv->ggtt.mappable, page_base,

		if (fast_user_write(ggtt->mappable, page_base,

				    page_offset, user_data, page_length)) {

			ret = -EFAULT;

			goto out_flush;
@@ -1790,7 +1791,8 @@ int i915_gem_fault(struct vm_area_struct *vma, struct vm_fault *vmf) 
{

	struct drm_i915_gem_object *obj = to_intel_bo(vma->vm_private_data);

	struct drm_device *dev = obj->base.dev;

	struct drm_i915_private *dev_priv = dev->dev_private;

	struct drm_i915_private *dev_priv = to_i915(dev);

	struct i915_ggtt *ggtt = &dev_priv->ggtt;

	struct i915_ggtt_view view = i915_ggtt_view_normal;

	pgoff_t page_offset;

	unsigned long pfn;
@@ -1825,7 +1827,7 @@ int i915_gem_fault(struct vm_area_struct *vma, struct vm_fault *vmf) 
	}



	/* Use a partial view if the object is bigger than the aperture. */

	if (obj->base.size >= dev_priv->ggtt.mappable_end &&

	if (obj->base.size >= ggtt->mappable_end &&

	    obj->tiling_mode == I915_TILING_NONE) {

		static const unsigned int chunk_size = 256; // 1 MiB
@@ -1853,7 +1855,7 @@ int i915_gem_fault(struct vm_area_struct *vma, struct vm_fault *vmf) 
		goto unpin;



	/* Finally, remap it using the new GTT offset */

	pfn = dev_priv->ggtt.mappable_base +

	pfn = ggtt->mappable_base +

		i915_gem_obj_ggtt_offset_view(obj, &view);

	pfn >>= PAGE_SHIFT;
@@ -3458,7 +3460,8 @@ i915_gem_object_bind_to_vm(struct drm_i915_gem_object *obj, 
			   uint64_t flags)

{

	struct drm_device *dev = obj->base.dev;

	struct drm_i915_private *dev_priv = dev->dev_private;

	struct drm_i915_private *dev_priv = to_i915(dev);

	struct i915_ggtt *ggtt = &dev_priv->ggtt;

	u32 fence_alignment, unfenced_alignment;

	u32 search_flag, alloc_flag;

	u64 start, end;
@@ -3505,7 +3508,7 @@ i915_gem_object_bind_to_vm(struct drm_i915_gem_object *obj, 
	start = flags & PIN_OFFSET_BIAS ? flags & PIN_OFFSET_MASK : 0;

	end = vm->total;

	if (flags & PIN_MAPPABLE)

		end = min_t(u64, end, dev_priv->ggtt.mappable_end);

		end = min_t(u64, end, ggtt->mappable_end);

	if (flags & PIN_ZONE_4G)

		end = min_t(u64, end, (1ULL << 32) - PAGE_SIZE);
@@ -3712,6 +3715,9 @@ i915_gem_object_flush_cpu_write_domain(struct drm_i915_gem_object *obj) 
int

i915_gem_object_set_to_gtt_domain(struct drm_i915_gem_object *obj, bool write)

{

	struct drm_device *dev = obj->base.dev;

	struct drm_i915_private *dev_priv = to_i915(dev);

	struct i915_ggtt *ggtt = &dev_priv->ggtt;

	uint32_t old_write_domain, old_read_domains;

	struct i915_vma *vma;

	int ret;
@@ -3766,7 +3772,7 @@ i915_gem_object_set_to_gtt_domain(struct drm_i915_gem_object *obj, bool write) 
	vma = i915_gem_obj_to_ggtt(obj);

	if (vma && drm_mm_node_allocated(&vma->node) && !obj->active)

		list_move_tail(&vma->vm_link,

			       &to_i915(obj->base.dev)->ggtt.base.inactive_list);

			       &ggtt->base.inactive_list);



	return 0;

}
@@ -4297,9 +4303,13 @@ i915_gem_object_ggtt_pin(struct drm_i915_gem_object *obj, 
			 uint32_t alignment,

			 uint64_t flags)

{

	struct drm_device *dev = obj->base.dev;

	struct drm_i915_private *dev_priv = to_i915(dev);

	struct i915_ggtt *ggtt = &dev_priv->ggtt;



	BUG_ON(!view);



	return i915_gem_object_do_pin(obj, i915_obj_to_ggtt(obj), view,

	return i915_gem_object_do_pin(obj, &ggtt->base, view,

				      alignment, flags | PIN_GLOBAL);

}
@@ -4611,13 +4621,15 @@ struct i915_vma *i915_gem_obj_to_vma(struct drm_i915_gem_object *obj, 
struct i915_vma *i915_gem_obj_to_ggtt_view(struct drm_i915_gem_object *obj,

					   const struct i915_ggtt_view *view)

{

	struct i915_address_space *ggtt = i915_obj_to_ggtt(obj);

	struct drm_device *dev = obj->base.dev;

	struct drm_i915_private *dev_priv = to_i915(dev);

	struct i915_ggtt *ggtt = &dev_priv->ggtt;

	struct i915_vma *vma;



	BUG_ON(!view);



	list_for_each_entry(vma, &obj->vma_list, obj_link)

		if (vma->vm == ggtt &&

		if (vma->vm == &ggtt->base &&

		    i915_ggtt_view_equal(&vma->ggtt_view, view))

			return vma;

	return NULL;
@@ -5210,11 +5222,12 @@ u64 i915_gem_obj_offset(struct drm_i915_gem_object *o, 
u64 i915_gem_obj_ggtt_offset_view(struct drm_i915_gem_object *o,

				  const struct i915_ggtt_view *view)

{

	struct i915_address_space *ggtt = i915_obj_to_ggtt(o);

	struct drm_i915_private *dev_priv = to_i915(o->base.dev);

	struct i915_ggtt *ggtt = &dev_priv->ggtt;

	struct i915_vma *vma;



	list_for_each_entry(vma, &o->vma_list, obj_link)

		if (vma->vm == ggtt &&

		if (vma->vm == &ggtt->base &&

		    i915_ggtt_view_equal(&vma->ggtt_view, view))

			return vma->node.start;
@@ -5241,11 +5254,12 @@ bool i915_gem_obj_bound(struct drm_i915_gem_object *o, 
bool i915_gem_obj_ggtt_bound_view(struct drm_i915_gem_object *o,

				  const struct i915_ggtt_view *view)

{

	struct i915_address_space *ggtt = i915_obj_to_ggtt(o);

	struct drm_i915_private *dev_priv = to_i915(o->base.dev);

	struct i915_ggtt *ggtt = &dev_priv->ggtt;

	struct i915_vma *vma;



	list_for_each_entry(vma, &o->vma_list, obj_link)

		if (vma->vm == ggtt &&

		if (vma->vm == &ggtt->base &&

		    i915_ggtt_view_equal(&vma->ggtt_view, view) &&

		    drm_mm_node_allocated(&vma->node))

			return true;

drivers/gpu/drm/i915/i915_gem_execbuffer.c

+7 −5
Original line number Diff line number Diff line
@@ -313,7 +313,8 @@ relocate_entry_gtt(struct drm_i915_gem_object *obj, 
		   uint64_t target_offset)

{

	struct drm_device *dev = obj->base.dev;

	struct drm_i915_private *dev_priv = dev->dev_private;

	struct drm_i915_private *dev_priv = to_i915(dev);

	struct i915_ggtt *ggtt = &dev_priv->ggtt;

	uint64_t delta = relocation_target(reloc, target_offset);

	uint64_t offset;

	void __iomem *reloc_page;
@@ -330,7 +331,7 @@ relocate_entry_gtt(struct drm_i915_gem_object *obj, 
	/* Map the page containing the relocation we're going to perform.  */

	offset = i915_gem_obj_ggtt_offset(obj);

	offset += reloc->offset;

	reloc_page = io_mapping_map_atomic_wc(dev_priv->ggtt.mappable,

	reloc_page = io_mapping_map_atomic_wc(ggtt->mappable,

					      offset & PAGE_MASK);

	iowrite32(lower_32_bits(delta), reloc_page + offset_in_page(offset));
@@ -340,7 +341,7 @@ relocate_entry_gtt(struct drm_i915_gem_object *obj, 
		if (offset_in_page(offset) == 0) {

			io_mapping_unmap_atomic(reloc_page);

			reloc_page =

				io_mapping_map_atomic_wc(dev_priv->ggtt.mappable,

				io_mapping_map_atomic_wc(ggtt->mappable,

							 offset);

		}
@@ -1431,7 +1432,8 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data, 
		       struct drm_i915_gem_execbuffer2 *args,

		       struct drm_i915_gem_exec_object2 *exec)

{

	struct drm_i915_private *dev_priv = dev->dev_private;

	struct drm_i915_private *dev_priv = to_i915(dev);

	struct i915_ggtt *ggtt = &dev_priv->ggtt;

	struct drm_i915_gem_request *req = NULL;

	struct eb_vmas *eb;

	struct drm_i915_gem_object *batch_obj;
@@ -1504,7 +1506,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data, 
	if (ctx->ppgtt)

		vm = &ctx->ppgtt->base;

	else

		vm = &dev_priv->ggtt.base;

		vm = &ggtt->base;



	memset(&params_master, 0x00, sizeof(params_master));

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